Jitter is one of life’s little annoyances… especially if you are neurosurgeon with a caffeine addiction. Jitter is fundamentally the time variation of a system from an expected baseline and comes in two major flavors – deterministic (systemic) and random. Electronically, it appears in clocks and other digital systems where the intended “information” carries some uncertainty. This “uncertainty” can affect analog systems as well such as degrading the SINAD and ENOB of data converters due to jitter present in the clocks. Sometimes jitter is intentional and is used to spread out the energy found in the fundamental of a clock source to reduce EMI. Most of the time it is the bane of communications and digital engineers since it degrades the bit error rate (BER) of the system.
Jitter found in communication systems has many sources… most are systemic and a few are environmental and random. A way to think about how jitter manifests itself is to consider a transmission system with a hypothetically perfect receiver that has a threshold of VT. Imagine that when an input signal crosses the input threshold, the output of the receiver immediately switches to the new state (zero delay). Also consider that the transmitted signal is theoretically perfect with a finite symmetrical transition period (tTRANS > 0). If you were able to transmit the perfect data via a perfect lossless medium, then the system would have an uncertainty of zero – which, as we all know in reality it never will. What really happens is that even with a perfect receiver where VT never moves, VS has additive components caused by EMI, thermal or shot noise and systemic limitations such as impedance mismatches and high frequency loss in the transmission line. This means our signal voltage VS is now VS + VJ where VJ is the sum of all the time variant voltage fluctuations. In addition, the severity of these fluctuations will be affected by the high frequency loss of the transmission line. The loss of the high frequency components increases the transition time of the signal increasing the uncertainty of when the signal crosses VT. Add base line wander charging effects and driver asymmetry and the uncertainty increases even further which continues to degrade the jitter performance.
Looking only at the time domain, VJ adds a component of uncertainty to the known signal which shifts the point where the ideal receiver decides to switch the output. So if the ideal signal is f(t) = VS(t) > VT where Vs(t) is the voltage function representing the ideal digital signal, then the actual output is:
f(t) = [VS(t) + VJ(t)] > VT
Where VJ(t) is the contribution of all time variant voltage fluctuations caused by random and systemic sources. If VJ(t) goes to zero, then you recover the original perfect signal. But as an engineer you know… this is never the case.
All these theoretical exercises and thought experiments are fun, but if you’re like me I like a good drawing to visualize the concept. Take a look at the figure 1 below where I’ve taken our theoretical transmission system and illustrated the various components.
Figure 1 - Jitter Manifestation in an Ideal Transmission System
Figure 2 shows a view of the real world… this time in the frequency domain which shows loss in the channel and the affects of cross-talk.. If you're trying to fix some of these problems, check out TI's driver / equalizer / retimer portfolio as well as our clocks and jitter cleaners. If you’d like to read more on jitter along with its sources and some solutions, check out my latest column in Electronic Design, “Improve Your Jitter Performance in Communications Systems”. Till next time…
Figure 2 - Some Deterministic Jitter Sources in the Real World
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