How low can you go? How to reduce power consumption in data-acquisition systems

When trying to reduce system power consumption, one method is to look for devices to optimize or remove. Another method is to evaluate the system as a whole and optimize for system functionality before evaluating at the component level. In this post, I’ll go over design techniques using low-power analog components that can help optimize overall system power consumption.

Add an external ADC to reduce overall system power consumption

In low-power data-acquisition systems, integrating an analog-to-digital converter (ADC) into the controller reduces overall component count, cost and ideally power consumption. But this approach may actually increase overall power consumption.

When sampling at 1kSPS, the typical power consumption of integrated ADCs in several low-power microcontrollers (MCUs) is often greater than the power consumption of a discrete ADC (Figure 1).Therefore, you can actually reduce overall system power consumption by placing the ADS7042 external to the microcontroller and turning off the microcontroller’s integrated ADC.  In fact, TI’s ADS7042 ultra-low-power 12-bit ADC consumes only 234nW of power when sampling at 1kSPS.

Figure 1: Power consumption of integrated ADCs vs. the ADS7042 at 1kSPS

An added benefit of using a discrete ADC instead of an integrated ADC is that you can keep the converter near the sensor signal to minimize noise pickup. A discrete ADC can also help expand the number of analog input channels that the microcontroller can support.

One concern with adding a device to save power is the amount of required board area for the discrete device. The ADS7042’s 1.5mm-by-1.5mm 8-pin quad flat no-lead (QFN) package is smaller than a standard 0805 surface-mount component, thus minimizing the impact to overall system-design size. In addition, the low pin count helps minimize routing during layout.

Examining a low-power data acquisition system circuit

Regardless of which type of ADC you ultimately choose for a low-power data-acquisition system, it is important to understand how to optimize the circuitry around the ADC to reduce overall power consumption. The main components in a data- acquisition system are the sensor input, the buffer to drive the sensor signal into the ADC, the ADC and the power source for the ADC.

An example of a low-power data acquisition system is showcased on the ADS7042 BoosterPack, which is a development board compatible with the TI LaunchPad™ development kit ecosystem. The circuit on the ADS7042 BoosterPack is designed to convert analog data from either an on-board ambient light sensor or a subminiature version A (SMA) connector (Figure 2).

Figure 2: Circuit diagram for analog input signals on the ADS7042 BoosterPack

When converting an external sensor input from an analog sensor source connected to the SMA connector buffered by the OPA316, the driver consumes 400µA of current at 3.3V, which results in 1.32mW of power consumption. This accounts for roughly 65% of the overall system power – which includes the power of the REFE3330 voltage reference (12.87µW) and the power of the ADS7042 ADC (690µW). If the sensor is directly connected to the ADC without the additional driver, as with the on-board ambient light sensor, the sensor circuit consumes only 99µW of power. This is 7.5% of the power consumed by the OPA316 in the first implementation of the circuit, without even taking into account the power required to drive the analog input-signal source (Table 1).

 Table 1: Circuit power consumption of the ADS7042 BoosterPack 

Reducing the need for the driver can help reduce overall power consumption. However, there are obvious trade-offs to using this solution. You must reduce the sampling rate of the ADC to maximize the settling time for the input sampling capacitor (CSH). But this has the advantage of also reducing the sampling rate and the power consumption of the ADC, as the converter’s power consumption scales linearly with the sampling rate (Figure 3).

Figure 3: Power consumption of the ADS7042 vs. sampling rate

When using the slowest sampling rate, 1kSPS, the throughput of the system is less than or equal to the sampling rate of the ADC, shown in Equation 1:

The input bandwidth is also limited by the sampling rate in accordance with the Nyquist-Shannon sampling theorem. Therefore, the input bandwidth is less than or equal to 500Hz, or half of the sampling rate (Equation 2): 

In addition to removing the need for the buffer, a lower sampling rate will also reduce the power consumption of the ADC.

Finally, the design will exhibit a slow transient response time related to the bandwidth of the system.  The response time is equal to the inverse of the input bandwidth or in this case 3ms, shown in Equation 3.

In this example, the use of an external discrete ADC helped reduce overall system power consumption. What is your experience with low-power system designs? Please log in and share your thoughts on low-power system design approaches in the comments.

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