Power Supply Bypassing—SPICE Simulations vs. Reality


Blogging from Wisconsin this week, attending my granddaughter’s second birthday.  :)

We recently received a question on our precision amplifiers E2E forum with a SPICE simulation schematic attached (thank you for providing a schematic!). It was an op amp circuit—the details aren’t important—the point is that it included bypass capacitors on the power supply pins. Of course, this may be because the engineer’s simulation program feeds directly into a circuit board layout program. In the final circuit these bypass caps are crucial. But are they needed for the simulation? There’s certainly no harm in including them but they are not required. Voltage sources in SPICE are perfect with zero impedance from DC to THz without any need for bypass capacitors.

The two circuits below will simulate identically in SPICE. The power supply bypass capacitor on the left side won’t help; the long connections to supply and ground on the right won’t degrade the simulation. But on your circuit board it’s a very different matter.

If your circuit board layout does not include enough bypassing or locate bypass capacitors in appropriate locations on the board, you might not get the expected performance. Or you may get an unwanted oscillation. Don’t blame the SPICE simulation; it is very unlikely to find these issues.

 Even if you model poor power supply bypassing with series resistance and inductance, macromodels are unlikely to accurately model the detrimental effects. We do not try to model the complex internal interactions of signals impressed on the power supply pins that could cause oscillations. In fact, some older macromodels may not even model output current as coming from the supply terminals. Our newer macromodels do a pretty good job simulating the amplifier’s ability to reject noise impressed on the supplies but it may not properly model the instability or oscillations it could create.

In the design of our ICs, we often do model these effects. We make very detailed simulations of the complete circuit—every transistor, resistor, capacitor is included. Parasitic elements such as lead inductance and on-chip trace resistances and layout-dependant capacitances are included. So we often do model the effects of a less than perfect power supply to see its effect on the device. But this level of detail is beyond what can possibly be simulated in macromodels.

Simulating your amplifier circuits with SPICE macromodels is a great tool, offering insight into many issues that can arise in circuit operation. Our most recent macromodels—the “Green-Lis” versions—are excellent, arguably the best and most complete in the industry. But they are just models. They cannot simulate every behavior that can arise. And they cannot account for bad practice in circuit layout and power supply bypassing.

You can get great insight into the performance attributes and behaviors included in our macromodels by looking at the text file describing an op amp (figure 2). For many years now, we’ve included a list of the macromodel’s features. To see this in TINA-TI, our free SPICE program, double-click on the schematic symbol, then click “enter macro.” Macromodels more than ten years old, or so, may not include this list and are likely to be much less sophisticated.

We’ll explore macromodels and other SPICE issues further in future blogs. Let me know what you would most want to cover. Comments welcome and thanks for reading,

Bruce

  • Great briefing Bruce, I wonder if you have time to comment on best practice to simulate power supply effects on circuit performance.

    Something that is a real life problem, such as power supply sag due to line and load variations?

  • Thanks Rene'.  I have plans for a blog on power supply rejection. I think it will address the issues you raise. Stay tuned... maybe two weeks or so.  Regards, Bruce.