We’ve been looking at stability of op amps, considering how phase shift (or call it delay) in the feedback path can cause problems. Picking up from last week, stability with a capacitive load is a tricky case. If you’re joining us late, you may want to first read the previous two blogs, Why Oscillations and Taming Oscillations.
The trouble maker, open-loop output resistance (Ro) of the op amp, is not actually a resistor inside the op amp. It’s an equivalent resistance dependent on the internal circuitry of the op amp. There’s no chance to change it without changing the op amp. CL is the load capacitance. If you want to drive a certain CL, you are stuck with the pole created by Ro and CL. A 1.8MHz pole inside the feedback loop of a 20MHz op amp in G=1 spells trouble. Check it out in figure 1.
Solutions to this issue have a common theme—they slow the amplifier down. Think about it… the loop has a fixed amount of delay, from Ro and CL. To accommodate this delay, the amplifier must respond more slowly so that it does not speed past, overshooting a desired final value.
A good way to slow things down is to put the op amp in a higher gain. Higher gain decreases the bandwidth of the closed-loop amplifier. Figure 2 shows the OPA320 driving the same 1nF load but in a gain of 10. The response to a small step is dramatically improved, but still marginal. Increase the gain to 25 or more and it would look pretty good.
But here’s another trick. Figure 3 is still a gain of 10 but with Cc added, slowing things down a bit more in just the right way. Not enough Cc and the response looks more like Figure 2. Too much Cc and you are headed for trouble, more like figure 1.
Getting this compensation just right is solving a “rate of closure” issue—Bode analysis. It’s more than I can tackle in a blog so I’m trying to temp you. A bit of intuition is helpful with these problems but if you want to advance to the next level of phase compensation competence you need Mr. Bode.
My former colleague Tim Green wrote an article series on the subject of op amp stability and Bode analysis. And my colleague Collin Wells has done a great job distilling the message to its essence. If you are ready to take this topic a step further, I highly recommend that you start with Collin’s presentation attached below. And if you are lucky, you can see him present it live at a TI Tech Days somewhere near you.
Comments welcome and thanks for reading,
Thanks for the "intuitive" insight that you have provided in this series of articles. In driving cap load you have suggested increasing the closed loop gain as a method to improve stability... I have used a series output resistor in the past to "isolate" the cap load and improve stability when changing gain is not really an option. What are your thoughts regarding this or other methods oh sage one ;-)
Thanks again and keep em coming!
Thanks for the comments, Bubba. You've raised a couple of ways to improve cap load drive. Each would probably require another blog and I fear that I've worn out my welcome on this topic for a time. You will find at least some of this in Collin's presentation (attached). I may return to the topic later after hitting some other subjects. Thanks for reading.
I absolutely agree with Bubba here! I just had a near miss at a nightmare of having to ditch an otherwise successful 4 layer PC board of a recent project, using several LME49721 dual op amps to buffer the output of some digital potentiometers. These op-amps are set up as unity gain followers, so adding gain pretty much means scrapping the board. But, the outputs of my op amps were being routed some 802 sized 0 ohm jumper resistors to the on board output jacks. Those 0 ohm jumpers were really not necessary, but it just seemed a good idea at the time in case I wanted to add some future isolation resistors. Well I sure am glad I did that because during testing of the circuit, I found that if there was a long audio cable connected to the output jacks, the slightest board transient would trigger high frequency oscillation. When I tried shorting the outputs through 100nF caps, I got the same effect, proving the problem was the capacitance created by the cable. Well it turned out that replacing my zero ohm jumpers with just about any low value of resistor completely solved the problem. What a sigh of relief!!! II settled on 1000 ohms, at least for now, until I can better determine the minimum value to eliminate the problem. But since I indend to normally drive a fairly hi-Z load of around 100K, the 1000 ohm resistors are probably fine. I guess adding this external resitor lowered the "pole" frequency below a point where it could cause any instability?
Thanks for your share on this topic, in fact, I have been confused by this problem for several days. Some other engineers from ADI and Microchip Inc have published some sheet on it, but I can't understand them accuratly. But your blog is very clear.
For the question raised by Randy Constan, i want to say that when you add a resistor between amplifier output pin and the capacitive load, a zero and a pole point will occur simutaneously, so it increase the magin in fact.
Hao Zhang, Beijing, China
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