Energy Zarr

Industrial Strength Design – Part II

Richard Zarr — Tue, 14 May 2013 19:13:00 GMT

In part 1 of this blog series I talked about harsh environments which include mines, mills, chemical plants, et. al. Designing for those environments means taking into consideration extremes which normal products (e.g. consumer goods) would never experience. We covered (briefly) some thermal issues found in these environments, but beyond high temperatures, corrosives and dirt there are dangers lurking that even humans cannot sense. I’m talking about Electromagnetic Interference or EMI susceptibility.

Most engineers think about EMI damage caused by electrical overstress. A good example of that is lightning damage - but equipment doesn’t need to be hit directly to take it out of commission. The lighting that does the actual damage may occur many miles above the equipment and may not even be seen!

In large networks where wire is strung out over miles, there can be damage caused by electrical overstress due to a phenomenon called “Cross Striking” (see the figure). This occurs when two electrically charged clouds drift near one another. An electrical potential appears between these two enormous capacitors and grows stronger as they get closer. On the ground, an opposite charge appears on the cabling caused by the static charge in the cloud above. It appears very slowly so no apparent problem is seen – yet.

Once the electric field strength between the two clouds exceeds the break-down voltage of the air between them, a bolt of lightning forms and rapidly dissipates the charge. This rapid discharge has now left an extremely large charge on the wires below with nothing holding it. This charge also rapidly dissipates causing extremely high voltage spikes on the cable which typically will destroy anything unprotected on either end. I know this… I’ve seen it first-hand. Nothing but ashes and a hole where my transceivers used to be! It just makes you go “hummmm… wow!”

To protect against this type of “invisible” damage, gas discharge tubes, spark gaps and ESD diodes need to be placed on either end of the cables to provide a path for the current to travel as the charge dissipates. This will keep the voltages seen by drivers, receivers or amplifiers within absolute maximums and prevent damage.

Another type of EMI susceptibility doesn’t damage the circuits, but actually causes them to fall out of specification. This problem often manifests itself in industrial environments where strong RF fields are used (e.g. microwave heaters in processing plants). It can also be caused by deliberate transmissions such as radio towers. This phenomenon can be seen by placing a cell phone next to most speaker phones while a call is active. A humming or clicking is often heard in the speaker phone due to interference with the transmitter in the cell phone. This is caused by the RF energy impinging on parasitic (or intentional) diode structures within amplifiers and injecting currents into the circuit.

The rectified signals can show up as offsets in the output of precision amplifiers as well. This is the critical problem in industrial systems which make very precise measurements in processes that require extremely accurate temperatures or pressures. To combat this, semiconductor designers add additional circuitry to harden the device against these external fields. An example of this is the LMP2021 or LMP2022 (dual) which is EMI hardened for precision measurements. For more detail on this topic check out application note SNOA497b – A Specification for EMI Hardened Operational Amplifiers. This white paper discussed a new parameter called the EMIRR or Electro-Magnetic Interference Rejection Ratio which is used to quantify the susceptibility of op-amps to EMI.

I hope this post sheds some light on some of the unseen perils that can damage or derail your precision circuits. For more information on industrial components, see TI's industrial offering page. I’ll cover some more ideas on helping build industrial strength designs in my next post… I welcome your comments or ideas as well. Till next time…

Industrial Strength Design - Part I

Richard Zarr — Mon, 29 Apr 2013 21:08:00 GMT

When you think of engineering for industrial applications, my first thought goes to environmental conditions of applications such as steel mills. There are motor controllers working right next to (or attached to) giant electric furnaces and smelters, huge overhead cranes and massive electric fields. It’s just another day at the office, huh? You may think it’s fairly straight forward to design for this environment until you realize that your electronics have passive cooling – no fan. Fans fail and if the circuit is part of a system that needs to be shut down to service, the financial impact to the company could be enormous.

So, here are some simple rules to get you in the ball park. First, heat is not your friend – even in Minnesota in the middle of winter. Consider how semiconductors are fabricated. There are processes (not unlike metallurgy) to anneal crystal defects or diffuse impurities… all are accomplished by the application of heat. So as a component heats up, this process continues. There are other creeping problems aided by elevated temperatures and large current which can cause metal interconnects within components to migrate and short. Designers of industrial control systems often de-rate operating junction temperatures based on their models – mostly from years of experience.

These systems stay in operation for over 20 years … working every day without failure until replaced or retired. So designers must take into consideration how to keep the temperature of the die well below the maximum operating point. To do this a thermal model is used. It can be extremely complicated using computers to calculate the temperature rise and heat flow. Or it can be simple to see if the circuit has a chance of working at all. To calculate the temperature rise of the die, the thermal flow can be modeled pretty much the same way we model current flow.

The thermal “impedance” or resistance to heat flow is given in data sheets relative to Point A and Point B. For instance Ө_JC (pronounced “theta” sub “J” “C”) is the junction (die) to case thermal impedance. It is given in degrees centigrade per watt (°C/W). It means that for every watt of power dissipated by the device, the junction temperature will rise so many degrees above the case temperature. So if the Ө_JCis 3°C/W and the device dissipates 10 watts, then the junction temperature will be 30 degrees C higher than the case temperature. There is also a junction to ambient version called Ө_JA which is the thermal impedance to the ambient air surrounding the part (assuming no heat sink). Any device dissipating more than 100mW will probably need a method to carry the heat away.

The worst case problem with this scenario is having large thermal impedances with high power dissipation. This happens often in small linear regulators such as the LM340 in a SOT-223. Even with unlimited copper, the best Ө_JA will be no lower than 50°C/W which is a limitation of the package. So if the ambient air in the box is 85°C, the input voltage is 12V, the output voltage is 5V (7V drop) with a load current of 100mA (700mW power dissipation), then the temperature of the die will be 120°C. You can see that package selection is EXTREMELY important. Take the same part and put it in a DPAK (32°C/W) and the die temperature (same conditions) drops to a bit over 107°C.

So next time you’re designing for industrial strength, take out the hand calculator for your sanity check to make sure your devices won’t end up in thermal shutdown… or worse! Next time I’ll cover some more on industrial strength design ideas for keeping your circuits alive in harsh environments… Till next time!

More Analog for Industrial solutions here.

Revitalizing Op-Amp Topologies

Richard Zarr — Tue, 16 Apr 2013 15:42:00 GMT

If you are as old as I am, you may remember the quintessential “Op-Amp Cook Book” by Walter Jung (I have an autographed copy) or the must have “Intuitive IC Op-Amps” by Tom Frederiksen (I also have an autographed copy). Many of the useful circuits in both of these works employ split supply op-amps such as the LM741. In the early days of integrated op-amps, the input and output range failed to match the supply rails. Thus, to guarantee that the signal would not be clipped or distort, the supply voltage of choice was often +/- 15V (30V total). As the market began to shift toward mobile, battery operated devices, the basic building block for analog was redesigned to provide rail-to-rail inputs (common mode voltage would include V- and V+) as well as outputs. At the same time, the supply voltage was reduced in many devices below 12V.

Since many designs of classic circuits used split supplies, ground was the common point for all signal references (+/- V). That is, the analog signals would swing around ground. The basic inverting and non-inverting amplifiers shown in figure 1 both use ground as the reference bias point and must have split supplies. You may note that if you try to use the inverting topology with V- connected to ground, it will not work. The output cannot swing below ground to drive the differential input voltage to zero. So what do you do if you want to use newer, higher performance, lower power operational amplifiers? Simple… read on.

FIGURE 1 - Classic Op-Amp Configurations (left is inverting, right is non-inverting)

This is a simple trick that will allow you to dive into all the classic designs and convert them to single supply operation. Each of the classic topologies uses ground as the reference point. To convert a design to single supply, this point must move to a new bias point that is within the operating range of the amplifier – a midpoint value. If you are using a +12V and ground, then the center bias point would +6V. Sounds very simple! Make a voltage divider with two resistors from the supply to ground and replace the ground connections with the new +6V divided value… right? Maybe hang some capacitance on the output to filter the bias voltage, sounds good. Not so fast…

Depending on the topology, significant currents may be flowing in and out of the original ground point. This means the new single supply system needs an active bias voltage control to regulate the output by both sinking and sourcing current. A solution to that is shown in Figure 2. Using a high power, wide bandwidth op-amp such as the LMH6642 (or LMH6644 if you want a quad), the new design will work from a single supply. The new signal reference is now the output of the bias generator which is halfway between the rails. Notice the series resistor on the output of the LMH6642. This is to prevent the internal compensation from being affected which will reduce phase margin and potentially cause high frequency oscillations on the output. Not something you want to happen for a reference voltage!

Figure 2 - Improved Single Supply System - Inverting Amplifier

Figure 2 shows that the bias circuit will drive other amplifiers (or devices) in your system (based on the drive of the LMH6642). So if you are building filters, you can utilize the same bias point across the stages. Hope this simple little trick helps you get over the single supply blues - it has helped me countless times! Till next time...

To Be Single or Differential, That is the Question

Richard Zarr — Tue, 09 Apr 2013 18:29:00 GMT

Whether 'tis nobler to signal via complementary means, or to take arms against a sea of noise… ah, but I take literary license with Shakespeare. But it does raise a real question… should a designer use differential or single ended methods for carrying analog signals? The answer also contains a question… which is, “it depends on the SNR requirements” or “it depends, what are the system requirements?” to be exact. In high performance systems, noise can be everywhere, but will that warrant the additional complexity of differential signals?

In low speed signaling it is much simpler to use a single (ground referenced) signal. In the singled ended mode there are two options – unipolar and bipolar. The unipolar option swings the signal between V+ and ground. This is common for single supply systems and can actually be configured in a bipolar fashion with biasing (more on this in a minute). Bipolar signaling in classic sense swings the signal between V- and V+ centered at ground. Many operational amplifier circuits are designed with this type of signaling and (NOTE: IMPORTANT INFORMATION FOLLOWS) will not work with a single supply op-amp (e.g. +5 and ground). However, by moving the bias point of the amplifier to V+/2, you can emulate the split supply bipolar system and the standard op-amp circuits will again work (more in an upcoming blog post). In this configuration, the bias voltage (+2.5V in the example) is the new virtual ground reference. All signal references are made to this voltage. If you AC couple the input signal it will be bipolar relative to the Vbias voltage (the virtual ground). In our example “working” inverting amplifier that would look like +/- 2.5V signal input relative to +2.5V bias – output would be inverted relative to the same bias voltage.

As signal speeds increase, the voltage swings are reduced to mitigate capacitive loading. It is not uncommon to see 1 - 2V or +/- 1V levels driving (capacitive) cabling. As frequency content increases, it is often a requirement to move to differential pairs (and controlled impedance transmission lines) which are terminated at both ends. The termination is both to generate a voltage for the receiver or amplifier and to terminate the transmission line to limit reflections. But what if an engineer has a design using a high speed input signal and needs to convert it to a differential signal. This is common for designs using high-speed analog to digital converters such as the ADC14DS105. This ADC has differential inputs… so they can either transformer couple which will degraded low frequency response or use the circuit shown below. This circuit DC couples the bipolar signal resulting in DC accuracy – important for applications such as video… it also uses a unique differential amplifier - the LMH6553 - which has a protection clamp on the output. This prevents large input swings from damaging the ADC - something that could happen if the input is a connector on the outside of the equipment! In addition, the circuit below is terminated for 50 ohm transmission lines.

Bipolar to Differential ADC Front End

Hope this brief discussion enlightens you to the trials and tribulations of single versus differential signaling. I’ll elaborate on this topic and some more op-amp circuits (if you like them) in future posts… till next time!

Everything is Part of the Circuit

Richard Zarr — Tue, 12 Feb 2013 15:57:00 GMT

Now I’m sure as engineers we have all studied circuit modeling. SPICE is an amazing tool to emulate how your final circuit might perform… but what’s really interesting is that passive components such as resistors, capacitors, inductors and wires (conductors) are far more than that as frequency increases! It is also important to revisit the printed circuit board… it too is more than simply “wires”.

At DC, copper traces look like a resistor with the value dependent on temperature and the cross sectional area of the trace. As frequency increases, weird things start to happen. The trace begins to look more like an inductor limiting instantaneous current flow. At higher frequencies there is a phenomenon called the “skin effect” that pushes the electrons to the outside of the conductor. This appears as an attenuation that affects the signal at roughly the square root of the frequency. There is also electric field coupling to other traces… namely ground or power planes. The board material that sits between the two conductors forms a capacitor and this also attenuates the signal fairly linearly with frequency. As you can see, if you are building 1GHz clock distribution systems, the PCB is already providing you free resistors, inductors and capacitors!

But what about using intentional devices such as capacitors? The latest passive technologies have provided ceramic capacitor values of many microfarads in tiny little packages (e.g. 22uF 0805 ceramics using Y5V dielectric). Even though these devices are capacitors, they are really a capacitor with a low value series resistor and inductor along with a very high value parallel resistor. All of these “parasitic” sub-components are byproducts of the physical implementation and chemistry of the device. The series impedance is most important in switched mode power supplies where the impedance can affect the stability of the control loop. This is why you may want to parallel smaller values which have the effect of increasing capacitance and lowering series impedance.

What’s more interesting is that due to the chemistry of the capacitor, it can actually affect the high frequency response… which can be VERY bad if you are attempting to bypass high frequency transients. A good tutorial on these effects for ceramic chip capacitors can be found on Johanson Dielectrics web site. For instance, the dielectric constant for NP0 (NP – Zero) capacitors are extremely stable with temperature, but X7R dielectric can vary +/-15% over temperature… this obviously can affect your design… the NP0 dielectric is much more stable, so if you are building a filter, you will want to use NP0 dielectric capacitors.

Ultimately, the capacitor’s parasitic components will impede its ability to carry AC signals, so the PCB can actually become useful. This is called “planar capacitance” and is commonly created by sandwiching a ground and power plan very close using the board material as the capacitor’s dielectric. In this application, surface area provides the increase in capacitance and can help bypass high frequency nodes (vias that draw or sink current to the plane).

All in all, it is very important to remember that rapid high current transients and high frequencies can cause all kinds of chaos if the parasitic effects of the system are not considered… believe me… I have made those mistakes and have felt the consequences. Make sure you know the chemistry of the capacitors and the style inductors you are using… a customer once asked me how theycould tell if they were using the correct inductor in a switch mode power supply. I asked him how much it weighed… (no joke). Turned out he had the correct value of inductance, but was using an RF air core choke… needless to say the power supply had very poor load regulation! Just something to help you smile and get through the day… till next time!

Where Did I Go Wrong? The System Edition

Richard Zarr — Thu, 17 Jan 2013 16:03:00 GMT

In my previous blog “Where Did I Go Wrong? Funny Mistakes in Electrical Engineering” I discussed some simple, yet devastating things that led to circuit failures. In this post, I’m going to touch on a couple items that caused several system wide failures and yes… one is energy related. So sit back, enjoy a cup of your favorite caffeinated beverage (or decaf if you have the jitters) and read on.

The Dreaded “Test” Pin

It was the early 90’s and my company was involved with designing a new type of fax machine for Eastern Europe. The Berlin Wall had come down and Germany had been reunited… the only problem was my German brethren had inherited the ancient Soviet era electronics and telecommunications from the east. The Deutsche Bundespost (the equivalent of our US postal service) controls all telecommunications, so they were tasked with “upgrading” all the systems to their current standards. The problem was in the quality of the wiring and amplifiers used by the Soviets… a normal fax machine would not communicate reliably due to the high error rates. So, our customer proposed using Forward Error Correction (FEC) in the protocol – unique to Germany – to fix the problem. The only issue was that it didn’t exist yet. They won the contract with the Bundespost and came to us for help.

We had a fax machine reference design that was based on a processor and an ASIC which made up the majority of the electronics. All that was needed were a few changes to the ASIC and some code to facilitate the FEC. It took about 6 months to build the first working prototypes based on our reference design… and all was going well – until the phone call came in. It appeared that the ASIC was draining the coin cell backup battery in about 2 days losing all the settings. My boss at the time challenged me to find a solution, and if I could without re-spinning the ASIC, a case of Champagne would be mine!

As you can imagine, this was going to be a fox hunt. The problem was hiding somewhere in the ASIC, but where and why? I flew to California to work with the ASIC designers and see if anyone had any idea why this was happening. After poring over die plots, schematics and system block diagrams I finally asked the question if anyone had run the system under a microscope... the answer was “no”. I was also told this was impossible due to the light of the microscope causing offsets in the logic due to the photoelectric effect. You couldn’t probe the die while looking at it. I suggested we place the probe and turn the lights off… all of them – lab included. After everyone stopped laughing we were busy hooking it up in the lab.

About a day of probing found a signal that was not detected during the device functional testing running around the ASIC even when powered down (in stand-by). It was noise from some source – but where? With a bit of snooping we found that a system test pin with extremely high input impedance was the source. The documentation showed the pin as a “no-connect”, so the customer did just that… they left it floating. We grounded the pin and the problem was solved. The RTC now ran for years without draining the coin cell and the customer was extremely happy… Oh and that case of Champagne… I’m still waiting! But the satisfaction of finding such an obscure thing was reward enough… plus I can share it with you. The lesson here is to question things like “no-connect pins”… and exactly what they are for. That pin had been connected on the tester and held high (test mode), but was missing an internal pull-down which would have solved the system wide problem of draining the stand-by battery.

The Invisible LCD Display

OK, here’s a system integration faux pas that goes beyond a single piece of equipment. I couldn’t resist writing about this due to the nature of the mistake – it’s on the order of building a steam turbine power plant in the desert (hint: you need water to make steam). My car was down for repair recently and the dealership provided a loaner. It was an older model (2 to 3 years old), but was fine for getting around until my new car was repaired. I jumped into the loaner, put on my Ray Ban – P polarized sunglasses, put the car in drive and left. As I was driving I looked down to see the time on the clock / radio and it had gone black - “Weird” I thought. I hit the power button a few times – nothing. I moved on to other thoughts – especially the large tractor trailer rig attempting to turn me into paste, but on arrival at my destination, I removed my glasses and looked back at the clock. It was back on! It then occurred to me to put my glasses back on while looking at the display. Sure enough, the engineers that selected the LCD display for a “car” radio used a display with horizontal polarization. Sunlight reflecting off non-metallic surfaces – such as water, asphalt, snow, etc. – converts some of the light’s polarization from random to horizontal. This discovery led to polarized lenses that are “vertically” polarized and almost completely block the horizontally polarized reflected light and thus reduce glare. Unfortunately, I think the designers of this particular car radio missed that day in physics class…

The moral of these stories are that systems add complexity beyond the combination of the components. Designers need to communicate and understand how circuits, sub-systems and even full systems will be integrated with other components. I’m sure as the 10,000’s radio came off the line and the phone rang regarding the display someone must have gone – D'oh! Till next time!

Tis the Season to Save Energy

Richard Zarr — Mon, 10 Dec 2012 15:00:00 GMT

In my never ending quest to lower our carbon footprint, I bring you good tidings of progress made and lessons learned. Recently my wife and I became “empty nesters” and our two daughters are learning that a one degree change in the thermostat can affect their electric bill. You may have read some of my previous posts such as “Saving Energy Takes Getting your Hands Dirty” or ”Ignorance is Bliss... How Knowing Too Much Can Ruin Your Day”. Both of these posts exemplify the old adage that “The Blacksmith’s kitchen often contains wooden utensils” or in other words, my home projects are the last to get finished!

And so it goes… my never ending home automation project to keep our now less occupied home more efficient. I have made progress, and so have many of our customers! For example, the NEST thermostat (available at Best Buy and other fine retailers) learns your behavior and adapts to your lifestyle. It employs WiFi to connect to the web and track your usage as well as provide you control over your HVAC system… even from your smart phone! This is something I’ve been trying to do for a few years. So if you’re struggling on what to buy that geeky family member or (“cough”) co-worker…, this is a great gift and it will benefit the planet too!

I’ve also made some progress (you can see the before and after shots below) to at least neaten up the 4 miles of CAT5e I have in the house… no joke, 20,000+ feet. I’ve also terminated the 100+ connections (finally) providing me reliable connections to the sensor and controls for the house.

Dimming lighting can save a tremendous amount of energy since the TRIAC in the dimmer only turns on a percentage of each half cycle to provide reduced energy to the load. This can both reduce the amount of energy consumed as well as extend the life of incandescent bulbs. Some newer CFLs and LED replacement bulbs read the phase angle of the TRIAC and can change the output level to mimic an incandescent bulb’s lower output level. In any case, dimming is good for saving energy.

Now my lighting system uses a technology called Universal Power Bus (UPB) and the technology works very well… in fact, it works too well. You see, I’m not alone in my quest to automate… so is my neighbor. When I noticed that one of our fans kept coming on at a weird (un-programmed) time, I simply wrote it off as a programming error and turned the fan back off… but then it came on again. This repeated about three more times and finally I gave up.

After some research and some guessing, I walked across the street to my neighbor and asked, “Hey, you guys don’t have any home automation on your lights do you?”… Well, yes they did. It turned out that their older X-10 system failed and they replaced all their light switches with UPB versions… and never changed the default network address ( a number that is unique to a network). For the past several months we’ve been turning each other’s stuff on and off! The fan I mentioned, well it turned out to be on the same address as my neighbor’s master bathroom light. When I was turning off our fan, I was leaving poor Victor in the dark! Probably worse was leaving his lovely wife in the dark while in the tub! Not nice…

However, with it being the holiday season, my post would not be complete without some commentary on LED holiday lighting. I’m so over the “one bulb fails and the large portion of the string goes out” thing, that I’m ready to throw away every incandescent Christmas light I own and buy LEDs. They are far more efficient, live MUCH longer and have more intense color saturation. There are issues however… and most of them are power related. LEDs require a constant current so in general, a string of them connected in series will see the same current which can be limited by a simple circuit. Sometimes however more sophistication is required (See Marjory Conner’s Holiday LED tear down).

And last I will leave you with a little poem where I’ve taken some literary license with a classic from Clement Clarke Moore… I hope you enjoy reading it as much as I did writing it! Have a wonderful holiday season and I will see you next year when I return from my time off! Till then…

THE NIGHT BEFORE CHRISTMAS

‘Twas the night before Christmas and all through the fab,

The equipment was whirring, even in the chem lab.

The yield charts were hung by the exit with care,

And all of our steppers were in good repair.

Most employees had gone home and were snuggled up tight,

With dreams of implanters that were powered up right,

And along with their processes all shiny and new,

They dreamed aggressive forecasts would surely come true.

When out in the clean room I heard such a clatter

I sprang from my lab bench and fell over a ladder.

Away to the hall way I flew like a plane,

Threw open the door and almost burst a vein.

Down with the equipment with lights all aglow,

An object was moving by the computers below.

Who could it be in those extra-large cleanroom clothes,

And how did he get in since security always knows?

He moved by the gear so lively and quick,

I knew in a moment it must be St Nick!

Faster than BiCMOS he worked hasty and neat,

Wafers of devices for toys to complete.

He looked up and saw me hovering above,

And I saw his hand wave in an antistatic glove.

He vanished as quickly as he had appeared,

With devices that Texas Instruments pioneered.

I heard a quick rumble on top of the roof,

And knew in an instant that I had my proof,

That TI silicon was in all his toys,

For all the good girls and all the good boys.

I heard him whistle for his reindeer to fly,

along with his booty of parts from TI.

As he flew to the north and clean out of sight,

I heard him exclaim, “Merry Christmas, and to all a good night!”

The Top 5 Reasons to be Thankful for CMOS

Richard Zarr — Tue, 20 Nov 2012 20:14:00 GMT

Tis the season to be thankful… November 22^nd marks Thanks Giving Day in the US where people gather around a table to consume a feast and give thanks for friends and family. The engineering community has much to be thankful for as well. The number “zero” for instance… without zero, the ability to represent large numbers would take a great deal of beans and things would be very difficult to calculate. The semiconductor industry has many things to be thankful for as well… the transistor is a good example. Without it, building active circuitry would require tubes… tough to put 2 billion of them in anything let alone a small tablet you carry under your arm. The evolution of the transistor led to the invention of the integrated circuit patented by Jack Kilby of Texas Instruments in 1959. What followed was an explosion of invention including the work done by C.T. Sah and Frank Wanlass of Fairchild which led to the development of the Complementary Metal Oxide Semiconductor (CMOS) process in 1963. This process has enabled countless technologies… so in my typical “count down” style, here’s my Top 5 Reasons we love CMOS.

Reason #5 : CMOS has extremely low power. The CMOS process when used in a digital fashion (on or off) uses extremely low power since it only uses current during the state transition. This is called the dynamic power and has a direct correlation to the frequency of operation and the square of the supply voltage. It does however “leak” a bit which adds“static power consumption” to the equation. However, modern low-power processes do an excellent job minimizing this leakage and improving on the dynamic power by lowering the supply voltage through smaller geometries.

Reason #4 : CMOS can be fabricated in extremely small geometries. It was once thought in the recent past that CMOS would “run out of steam” at about the 32 nm geometry node due to the thinning oxide of silicon… well, not so. Give humans a problem and they will find a solution. Enter “Hafnium” oxides which electrically appear “thinner” but are mechanically thicker to allow continued shrinking of the conduction channel. Say hello to sub 32 nm CMOS! Oh, and ask me how they make an optical mask with lines that close that doesn’t diffract 193 nm wavelengths of deep ultraviolet light… that’s another blog topic! Let’s just say constructive and destructive interference with a dash of phase shifting…

Reason #3 : Digital logic loves CMOS. One of the driving issues and possibly the basis for the invention of CMOS is the power dissipation in bipolar logic in the static state. CMOS is recognized as having extremely low power allowing high levels of integration (you can make small transistors close together and still get the heat out). The concept has evolved to even smaller non-planar 3D structures such as TriGate or Multigate FINFETs used in devices such as the Ivy Bridge processors from Intel. These transistors stack the gate vertically to provide more surface area allowing for better conduction when “on” and near zero conduction when “off”. This combats the short channel effects and other issues that lead to leakage in the static state… it continues to get better and better!

Reason #2 : Analog loves CMOS too. So you think digital logic is the only application for CMOS… not so! Analog has embraced CMOS for years for applications in low power amplifiers and comparators, voltage regulators, ADCs and DACs as well as other mixed-signal devices. The design methodology is a bit different in that the power calculations of the analog section must include the desired signal-to-noise ratio (e.g. P_min = 8kT * f * (S/N) where the signal V_pp = V_supply). However, lower bias currents combined with efficient logic provides the ability to create overall lower power analog systems. A classic application for this type of design is in class-D amplifiers found in most mobile devices such as smart-phones.

…and (wait for it…)

Reason #1 : You can make very cool things with CMOS. This is where the fun begins (for everyone – not only the engineers!). The fact that you can place billions of transistors on a single die, mix in analog functionality and lower power consumption to almost nothing (relatively), you can create some extremely neat things – and with the holiday season approaching, I’m sure you will be buying many of these amazing devices!

So enjoy your time this holiday with your family and all your cool gadgets which – fundamentally without the CMOS semiconductors would not exist… or at least would not fit in your pocket! Till next time…

What are you thankful for this year?

Tools for Joules

Richard Zarr — Mon, 12 Nov 2012 20:35:00 GMT

Since the dawn of time, man has invented tools to make life easier… and today is no exception. Look around and you’ll find that just about every man made item falls into the category. Don’t believe me? Try it out… OK, “automobile” – tool, used for transporting people or things from place to place, “house” – tool, used to shelter our families and our stuff, “cellphone” – tool, for communicating with your buds to find the nearest pub or monitor where your teenager went on a date. Sure you can find an exception or two (e.g. music, art, etc.), but for the most part, we are surrounded by them.

Tools have very specific applications. That is, they are designed to solve a particular problem. For instance, nails (a very old tool) are used to secure pieces of material (wood, canvas, concrete, etc.) to each other. However, a nail requires another tool to efficiently install it - most likely you’d use a hammer to drive it into place. Exceptions include my youngest daughter who prefers a heavy book-end… but I digress. Having the correct tool for the job is always more efficient and as we use these time savers we often find ways to improve them.

This brings me to the topic of this post - WEBENCH.

WEBENCH is an “expert system” from Texas Instruments that is used to engineer power supplies and systems, LED drive circuits along with many other design functions. It supports roughly 700 Texas Instruments products and has over 40,000 schematic symbols (active and passive) in the library. WEBENCH gives designers the ability to quickly compare solutions, select the best configuration for their application, optimize and simulate the design.

However, to date designs only lived inside of WEBENCH. It could be exported to a PDF for a nice, easy to read report. However, copying the schematic to another CAD tool was difficult, time consuming and prone to error… until now.

WEBENCH now features an “Export” function that allows you to do just that… export the schematic and symbols directly to your CAD system. It currently supports Altium Designer and P-CAD, Cadence OrCAD Capture CIS, Mentor Graphics DxDesigner and RS Components DesignSpark. Now you can simply press a button and export your design to your tool. There are plans to expand the export function to support other CAD tools as well as other features.

For more information on the new WEBENCH Schematic Export tool click here or watch this cool video! Till next time…

The Truth about Jitter

Richard Zarr — Fri, 26 Oct 2012 19:43:00 GMT

Jitter is one of life’s little annoyances… especially if you are neurosurgeon with a caffeine addiction. Jitter is fundamentally the time variation of a system from an expected baseline and comes in two major flavors – deterministic (systemic) and random. Electronically, it appears in clocks and other digital systems where the intended “information” carries some uncertainty. This “uncertainty” can affect analog systems as well such as degrading the SINAD and ENOB of data converters due to jitter present in the clocks. Sometimes jitter is intentional and is used to spread out the energy found in the fundamental of a clock source to reduce EMI. Most of the time it is the bane of communications and digital engineers since it degrades the bit error rate (BER) of the system.

Jitter found in communication systems has many sources… most are systemic and a few are environmental and random. A way to think about how jitter manifests itself is to consider a transmission system with a hypothetically perfect receiver that has a threshold of V_T. Imagine that when an input signal crosses the input threshold, the output of the receiver immediately switches to the new state (zero delay). Also consider that the transmitted signal is theoretically perfect with a finite symmetrical transition period (t_TRANS > 0). If you were able to transmit the perfect data via a perfect lossless medium, then the system would have an uncertainty of zero – which, as we all know in reality it never will. What really happens is that even with a perfect receiver where V_T never moves, V_S has additive components caused by EMI, thermal or shot noise and systemic limitations such as impedance mismatches and high frequency loss in the transmission line. This means our signal voltage V_S is now V_S + V_J where V_Jis the sum of all the time variant voltage fluctuations. In addition, the severity of these fluctuations will be affected by the high frequency loss of the transmission line. The loss of the high frequency components increases the transition time of the signal increasing the uncertainty of when the signal crosses V_T. Add base line wander charging effects and driver asymmetry and the uncertainty increases even further which continues to degrade the jitter performance.

Looking only at the time domain, V_J adds a component of uncertainty to the known signal which shifts the point where the ideal receiver decides to switch the output. So if the ideal signal is f(t) = V_S(t) > V_T where Vs(t) is the voltage function representing the ideal digital signal, then the actual output is:

f(t) = [V_S(t) + V_J(t)] > V_T

Where V_J(t) is the contribution of all time variant voltage fluctuations caused by random and systemic sources. If V_J(t) goes to zero, then you recover the original perfect signal. But as an engineer you know… this is never the case.

All these theoretical exercises and thought experiments are fun, but if you’re like me I like a good drawing to visualize the concept. Take a look at the figure 1 below where I’ve taken our theoretical transmission system and illustrated the various components.

Figure 1 - Jitter Manifestation in an Ideal Transmission System

Figure 2 shows a view of the real world… this time in the frequency domain which shows loss in the channel and the affects of cross-talk.. If you're trying to fix some of these problems, check out TI's driver / equalizer / retimer portfolio as well as our clocks and jitter cleaners. If you’d like to read more on jitter along with its sources and some solutions, check out my latest column in Electronic Design, “Improve Your Jitter Performance in Communications Systems”. Till next time…

Figure 2 - Some Deterministic Jitter Sources in the Real World

Contact me: energyzarr@list.ti.com

Index of all Energy Zarr posts.

100 Gbps Enterprise Trends

Richard Zarr — Tue, 09 Oct 2012 17:11:00 GMT

I remember the day the Internet (then ARPANET) found me… or should I say, I found it. I was a young engineering student working for a telecommunications company. The year was 1983 and 10 Mbps Ethernet (half-duplex) was the state-of-the-art computer interconnect. Then, Ethernet was brand new and used large coaxial cables with “vampire” taps to pierce the outer insulator and shield. They were spaced no closer than a meter apart to give the collision detection schemes time to react. It was so much faster than anything I had seen at the time and extremely expensive with a single NIC card pricing out at over $1000 U.S. (in 2012 dollars that would be around $2500 each). But my personal connection speed was nowhere near 10 Mbps… it was a mere 1200 bps (yes… 1200 bits per second). It was a dial-up line using an FSK modem connected to my University’s VAX computer which allowed (limited) access to one of only a few nodes that existed at the time. That year, TCP/IP replaced the original NCP (Network Control Program) protocol becoming the primary transport of the Internet.

So why the networking nostalgia? In the last 30 years, what originally was a connection of roughly 1000 nodes (mostly government, military and university sites) has exploded into billions of connected devices with fantastic bandwidth that was considered science fiction at the time. Many of these devices are mobile and have more computing power than super computers of the 1980’s that would fill a floor of a building yet they draw less energy than a light bulb. There is obviously a trend here… and Cisco tracks it every year. They provide the Cisco Visual Networking Index (VNI) which tracks the growth and span of the Internet and the current prediction is that the compound annual growth rate for IP traffic through 2016 will exceed 29%. The major driver of this traffic is now M2M or Machine-To-Machine connections - things talking to other things without human interaction.

The Need for Speed

Take a look at the figure below:

This shows the progression of Ethernet local area network (LAN) connection speeds. It is not completely accurate in that the original standards were half-duplex. The newer standards are full-duplex allowing simultaneous receive and transmit capability affectively doubling the capacity. This trend is being driven by the service providers that handle all the aggregate accesses to the Internet – those web pages live somewhere and search engines and servers must connect to something. I have written blogs about how much energy you consume when you click on a browser link (see: “The True Cost of an Internet Click") and it may seem trivial, but when you multiply that by billions of clicks, the number suddenly grows gigantic… and continuous! There is always a time zone where people are accessing some service found on the World Wide Web (thus the name).

As more people get connected, providers are looking for technology to make their “services” faster while not consuming additional power. Also, all those M2M connections run at the speed of embedded computers (not people clicking a browser), so the system bandwidth must accommodate that load increase as well. As pointed out by the Cisco study, this trend is growing rapidly which is driving not only the service providers, but the equipment suppliers as well. “Green” initiatives to use less power have spawned “Energy Czar” positions at many large Internet companies whose function is to manage everything from the procurement of equipment to the power they buy to run it in an effort to reduce their carbon footprint. This is serious business since there are tax credits at stake which will directly affect their bottom line.

However, in the end it’s all about how fast and efficiently you can move information. In this age, I get annoyed when I need to wait more than a second for a web page to load or more than 30 seconds to transfer a large file. I’m not alone and to provide this level of service, bandwidth to homes and businesses has grown into the tens of megabits per second. If you multiply out millions of homes and businesses with 10 megabit per second or more (I personally have a 30 Mbps down-load rate), you can see that all of that bandwidth aggregates to extremely large volumes of traffic. What is interesting to note is that even with all the external traffic, much of the traffic moving through switches and servers are within the data centers or from one data center to another. This is the unseen traffic that is the consequence of an external transaction such as paying a bill or selling stock online. There may be several of these for every user transaction multiplying the traffic once again.

All of this has pushed the enterprise interconnection speeds past 1 Gbps per lane to now 10 Gbps. The “Small Form-factor Pluggable” or SFP+ standard has expanded to the Quad SFP or QSFP connections with 4 transmit and 4 receive lanes with an aggregate bandwidth of 80 Gbps - but it doesn’t stop there. Lanes are now being pushed to 16 Gbps and soon to 25 Gbps. The primary transport is optical at these speeds, but the majority of interconnects within (or adjacent to) a rack are less than 5 meters. These connections are now moving to “Active Cables” or cabling that incorporates active signal conditioning to compensate for the loss and jitter induced by the copper wires. Soon, the physical layer for copper wire may move away from binary NRZ data to multilevel signaling (see my post, “Will Binary Communications Survive”). There are limits of physics that prevent going faster over copper wires and primarily the culprit is noise. The Shannon-Hartley Capacity Theorem (shown below) states that the capacity of a channel is directly related to the channel bandwidth (B) and the signal-to-noise ratio (S/N).

C = B·log₂(1+S/N)

This cannot be proven directly, but in general it can be justified with a little math. In the end, there is a finite capacity called the Shannon Limit that is dependent on the SNR even if the bandwidth is infinite (noise power increases with channel bandwidth). One can see that the physical world has handed engineers another problem to work around if we are going to move information even faster.

If you’d like to read more detail on this subject, see my column in Electronic Design Magazine entitled, “The Enterprise Prepares For Life Beyond 100 Gbits/s”. And as always, comments are welcome. Till next time…

Email me at: energyzarr@list.ti.com or visit the entire content of the blog at http://ti.com/energyzarr

Avoiding Excessive Engineering – Top Ten Tips for Doing More with Less

Richard Zarr — Mon, 24 Sep 2012 14:58:00 GMT

Avoiding Excessive Engineering – Top Ten Tips for Doing More with Less

I have often said, “Just because you can, doesn’t mean you should” and in the realm of engineering it is very applicable. I often examine systems that have thrown everything but the metaphorical “kitchen sink” into the design “just in case”. Interestingly enough, those same designs lacked proper engineering of the power supply or enough ESD protection on exposed connectors. So here’s my top 10 list of tips for doing more with less… in reverse count-down, so no reading ahead!

Tip #10 – Think “Energy Efficiency”. This is one of my favorite topics in engineering systems design (they don’t call me the “Energy Zarr” without reason). In fact, I often rant about waste in solving a problem with brute force. Now… with that said, sometimes a hammer is more effective when dealing with a nail, but in general, what goes in, must come out… and most of what comes out is heat. Take the quintessential LCD display like the 60” version sitting in your living room. That beauty has white LEDs for a back-light so it must be “green” right? Well, did you know that up to 80% of the light emitted by those LEDs is absorbed by the color filters on the LCD glass? It might be “thin” but it is definitely not efficient with the back-light energy. Technologies such as OLED or Sequential Frame LCD (SFLCD) do not use filters. OLEDs are self emitting and draw zero power when off. SFLCD technology still uses a back-light, but they are RGB LEDs. Each color frame (red, green, blue) is switched at such a high speed that the eye integrates the image into the proper colors. Each pixel is now larger and brighter with less power. How much less? Try 80 watts for an SFLCD TV versus 350 watts for the traditional LCD. Energy currently is a limited resource, so innovate where you can to save it.

Tip #9 – Revisit your System. I love it when engineers use a microscope when they should take a few steps back to see the big picture. It is so common and as an engineer I understand how that can happen. We often focus on a problem such as “how do I get the noise out of my analog input? The 20^th order filter I designed cannot be realized…” instead of taking a step back and saying, “due to the high noise environment surrounding this system, we should use full differential signaling to improve the SNR”. Take the time up front to define these things and you won’t need 10 op-amps to fix the problem.

Tip #8 – Communicate. In systems with many pieces it is extremely important engineers communicate with each other. It is very easy to get a specification and then go off and design to that “exact” specification… it’s what we do. Give me a specification of what goes in and what needs to come out and I’ll design you the circuit. The problem with this approach is what I call the “Isolated Brain” syndrome. It can lead to system creep and add additional “weight” to the design. Ask yourself this, “If I were the only engineer designing the entire system, would I still build this block the same way?” If you have control of the other blocks, you may not… so talk to your peers and let them know your intent… it just might simplify the entire system!

Tip #7 – Don’t Reinvent. I once had a funny discussion with a patent attorney about the redundancy in engineering. He told me a story about a company that designed the same circuit (and patented them) over a dozen times. Now that may sound like the company was on the leading edge and producing amazing intellectual property, but in effect, they designed the same function over and over. If someone there would have cataloged what had already been done, then maybe they would have spent more time innovating then replicating… just saying.

Tip #6 – Analog is your friend. I remember talking with the late Bob Pease about the state of the art in digital techniques for solving complex problems. He politely let me babble for a few minutes and then laughed, “Yep, I solved that same problem 10 years ago with two op-amps”. I wanted to crawl under something, but his office was completely full of every magazine he had ever received… but that’s another story. He was correct – sometimes a straight forward analog solution can not only be the most elegant, but also the most efficient. Sometimes you need the power of a DSP processor when systems are non-linear or the signal processing is not realizable in the analog domain. However sometimes simple analog circuitry can solve the problem. Don’t forget your roots.

Tip #5 – Software is Your Friend Too. Having knowledge of both digital and analog design is absolutely a bonus when solving complex engineering problems. The software engineers across the hall can sometimes help with some of the heavy lifting to keep the overall system bloat under control. I have found talking with the software designers about the problem can often lead to a much simpler hardware implementation that uses less space and power… as well as less cost. If you already have a microcontroller in the system, maybe utilizing this capability can solve some really tough problems. For instance, I once was working on a simple RF receiver circuit that had issues with range. I was struggling with limited SNR due to spurious noise in the demodulator – mainly caused by jammers in the spectrum. I had limited additional space for a filter, but I did have my little microprocessor. The solution was a very simple uniformly weighted discrete-time FIR filter. It sounds complicated, but in reality, when all the coefficients are all 1’s, then the multipliers go away… it was implemented with a simple bit summing function (if you want to know more, drop me an email: energyzarr@list.ti.com). My SNR went up and the range met the requirements… only a software change.

Tip #4 – Design with the User in Mind. This topic, probably more than the issues discussed in tip #10, is my greatest hot button (the one that is illuminated red and marked “never push this button – ever”). I see bad user interface designs everywhere I look – my favorite is the child-proof cap on arthritis medication… I’m sure grandma loves using the meat tenderizer hammer to open her meds. Software user interfaces are some of the worst offenders of over engineering and can easily be overdone on so many levels. I wrote a blog post years ago on this topic and I think I’ll write another one in the near future since some designers still didn’t get the memo. I must say that some manufacturers such as Apple and BMW as well as others study how people use their products… and it shows. Others (who will remain nameless – you know who you are) think that by giving the user hundreds of options and a multitude of controls is helpful… maybe, but most often not. System designers are most often in control of this specification. Think carefully about attributes such as color – avoid using low contrasts such as yellow on gray – color blind people cannot see this. Use color only when necessary and place controls in logical groups. Think “Less is More” here. Can a single control be combined? Can some be hidden in an “advanced” tab or disabled in a minimized view. Ask yourself, if my mom had to use this, could she figure it out (and if you’re mom is a super computer designer, disregard that last question).

Tip #3 – Get the Latest Information. The Internet is an amazing machine and it can provide you with the latest data sheets and design notes in literally seconds. There is really no excuse anymore not to have the latest information at hand and also to see what is new and applicable to your problem. There may be a new device available that is more “functionally efficient” which can lead to a simpler design, less board space and better energy efficiency. So before you start drawing schematics, check out TI’s website for the latest info!

Tip #2 – Use Tools. It’s amazing how many tools are available to aid engineers in designing more efficiently and many of them are free. Case in point, Ti’s Webench tool can not only solve complex point-of-load (POL) power architectures, but can also help design filters, LED drivers and other circuits. There are other down-loadable tools as well such as TI’s Clock Design Tool that are extremely useful when designing clock distribution architectures. These tools can assist in minimizing clock distribution networks and provide insight into the best way to distribute high speed clock signals throughout a system.

**edit: As Tom Hoffman so brilliantly pointed out, TI offers two other tools that can help you with your design: TINA-TI, a circuit design and simulation tool, and FilterPro which allows designers to create and edit active filter designs easily.

Tip #1 – Learn. I have an insatiable appetite for learning new things especially when it comes to technology and engineering. One thing I have found in my 30+ years in this industry is the need for a mentor. I have had several in my career and they have taught me many techniques for more efficient designs in both hardware and software. I also encourage readers to pick a design topic unfamiliar to them and learn about it. This additional knowledge outside of your expertise will be helpful when in the midst of a system architecture review. TI has this great on-line school to provide training on many topics.

BONUS TIP! – Pass it On. The most important tip I can give you is to share your knowledge. This is a way of improving your personal efficiency by helping less experienced engineers develop designs that are more powerful while requiring less energy – and less of your time reviewing and modifying their designs. We all carry a great deal of information from our experiences, so I fundamentally feel this as being one of the most important functions senior engineers can provide.

I hope you have found these “Top 10 Tips” for avoiding excessive engineering useful or inspiring… or if nothing else humorous. Look for more of my Top 10 Tips in future blogs! Till next time…

Rick Zarr

Contact me: energyzarr@list.ti.com

Index of all Energy Zarr posts.

Will Binary Communications Survive?

Richard Zarr — Wed, 14 Sep 2011 17:19:00 GMT

In my last post "Going Faster Has a Price" I discussed the issues with transmitting bits represented by two states at faster data rates and the problems of inherent loss in the media, ISI and many other phenomenon that screw up the signal. Through careful channel design and active means, engineers can transmit and recover bits over copper cable and back planes with ever greater rates. For example, National Semiconductor and Molex demonstrated 25Gbps+ communications over a back plane at DesignCon 2011 this year. But how long can the industry keep doing this without changing the way we define a bit on a backplane?

This problem is not a new one... as a matter of fact, it is a very old one going back to the early telecom days of modems. In the early days of circuit switched (voice) networks, filters were placed in the system to limit the bandwidth of the signal to around 3KHz which was enough to reconstruct a human female voice without distortion. This was done primarily as a means to frequency multiplex multiple telephone circuits on a single microwave transmission between towers (before fiber-optic lines). So when people tried to move "bits", they were limited to the 3Khz bandwidth.
Enter the Shannon-Hartley Capacity theorem (see below).

What this says is the maximum capacity of a channel to carry information is a function of the bandwidth (B) in Hertz and the Signal to Noise Ratio (S/N) which has no units. So as your noise goes up, your capacity to move information goes down. This plagued early engineers and limited the amount of information that could be moved through the network. Early modems used Frequency Shift Keying (FSK). One frequency was used to indicate a "0" state and another to represent a "1" state. The frequencies where chosen so that they would pass through the 3Khz limit of the channel and could be filtered from the noise. The problem is that you couldn’t switch between them faster than the bandwidth of the channel so you were still limited to the 3KHz... so how did they get around this? They used Symbol Coding.

Symbol coding basically combines groups of bits into a single symbol. That symbol can be represented by a frequency carrier and a combination of amplitude and phase. This led to the development of Quadrature Phase Shift Keying (QPSK) or Quadrature Amplitude Modulation (QAM) techniques which are in use today in modern cable modems. The group of bits can be sent all at once instead of one bit at a time... clever! However, it comes at a cost and a fair amount of complexity relegated to the world of digital signal processing.

But what about the high-speed digital signal path between two systems in our modern Internet? Today they use scrambled Non-Return-to-Zero (NRZ) coding which prevents DC wander and EMI issues... but it is still either a "0" or a "1" state - two levels representing the state of a bit. Will this medium ever move to other coding schemes to get more data through the channel as the early telephone system did? It might. Intel and Broadcom are both pushing for a standard that uses multiple levels and symbol encoding for 25 Gbps and beyond. This has the added benefit that more bits can be sent in a single transmission of a symbol. This is already being done today in Ethernet for the 10/100/1000 CAT-5/6/7 standards over UTP cable where the bandwidth of the channel is limited to around 350 Mhz. Will we see this at 25 Gbps and beyond? Possibly...

The problem with this method is power. It takes DSP technology at each end of the channel to code and recover the signals adding energy consumption to the mix. With thousands of channels in a modern data center, that power can add up really fast. NRZ techniques are very low in power consumption. National Semiconductor has produced devices that can move data at rates of 28 Gbps over copper media and back-planes at very low power consumption - something multi-level systems will find difficult to do. The industry agrees and is pushing back on the multi-level proposals.

There may come a day beyond 28 Gbps where there is no alternative but to go to multi-level symbol encoded systems, but I think that may be some time off in our future when 100 Gbps is far more common - perhaps even to your cell phone! Till next time...

Going Faster Has a Price

Richard Zarr — Thu, 17 Mar 2011 17:21:00 GMT

As you know, if you want a car that you can drive at 150 MPH, then you will pay a premium since it will require additional technology to keep you connected to the road and overcome the frictional forces of the air - as well as the "Gee, I look really cool in this car" effect which at times comes with an even greater price tag. In the physical world of high speed data and signal integrity, these laws also apply. Dr. Howard Johnson knows this well and has published several books on the subject. Even the subtitle "Advanced Black Magic" implies the difficulty in designing high speed systems.

Well folks, it isn’t getting easier. In fact, it is getting far worse. What is interesting about our world is our fundamental quest for knowledge - and the more rich the content of the information, the quicker people learn or share information. There is also the desire to communicate and the later also applies... the richer the content (photos, videos, music, etc) the more appealing the media. With the passing of the DMCA Title 2 which protected service providers from copyright infringement when making local copies to stream (or the unscrupulous pirates stealing it from them) along with the deployment of DOCSIS modems (now version 3.0 exceeding 100Mbps up and down - if the OSP is willing) the stage is set for one of the largest bandwidth explosions ever witnessed by man.

This expansion of bandwidth is driving data center equipment to ever increasing capacities... it wasn’t long ago that 1Gbps was fast... not any more. The norm in data centers now is 10Gbps Ethernet (802.3ae - optical) and quickly moving to 100G Ethernet! The latter has been accomplished via 10 lanes of 10Gbps, but is moving to 4 lanes of 25Gbps which matches the number of lasers and receivers found in most 100G modules. Do you know what happens to a 25G signal when it travels over a back-plane... it isn’t pretty. In fact, 10G has issues as well and it’s amazing that it works at all...

For example, take a look at the image below. This is a comparison of PCI Express signals (generation 1 through 3) over 26 inches of differential traces on a PCB (FR-4). As the speed of the signal increases the eye opening decreases. What used to work without issue now requires either a change in board material or active circuitry to restore the signal. These signals are far slower than a 25-28Gbps stream now being considered for electrical interface to optical modules. Without signal conditioning, careful layout (thank you Dr. Johnson), and good impedance control... no bits, just noise...

If you want to know more about fixing this, visit http://www.national.com/datacom and watch some of the cool videos on how it’s done... as Spock would say... "Fascinating"... Till next time...

Get Active - Lowering Networking Power in Data Centers

Richard Zarr — Thu, 16 Dec 2010 18:22:00 GMT

In the past I’ve discussed topics such as virtualization and digital power to help improve data center processing efficiency. I may even have discussed additions to the 802.3 standard to idle Ethernet drops when they were not in use. However, I have not addressed the interconnect power itself and it was surprising what I found.
In medium scale data centers such as those run by financial institutions, large retailers or corporations you will find thousands of server blades and the networking equipment to connect them together. What is interesting about this architecture is that the majority of networking traffic occurs within the data center itself. The reason for this is partially due to the litigious nature of our society and the never ending quest for information to help us understand ourselves. For example, simply performing an on-line stock trade - which to the user is a single transaction - will spawn dozens of additional inter-server transactions to secure, execute, verify and log the event as well as extract statistics used in market analysis. So when millions of people are on-line day trading stocks, billions of transactions are occurring within the data centers.
This huge amount of traffic need bandwidth and traditionally this has been accomplished by employing fiber optic cable. Fiber has the advantage of a very small diameter thus providing space for air-flow to cool the systems. Larger copper wire could be used for short hauls, but the diameter would block the air-flow and cause over-heating.
Fiber requires light (lasers) to operate and different distances and data rates require different modes of optical transmission. To allow flexibility, equipment manufacturers have created connectors that accept a module that contains the laser and receiver electronics. These are many variants, but the most accepted standards are SFP+ (Small Form-factor pluggable), QSFP (Quad SFP), CFP ("C" or x100 Form-factor Pluggable), XFP (10 Gigabit small Form-factor Pluggable), and CXP. These modules are actively powered and consume 400-500 milliwatts of power each! When you have thousands of them the power quickly adds up. Additionally, the heat generated must be dealt with and the modules are also very expensive.
Now what’s most interesting is that the majority of interconnects within the data center are only a few meters long! Normally passive copper cables would work fine but as mentioned above they would decrease the airflow at the back of the equipment. So a clever solution is to use smaller diameter copper wire (28-30 AWG) which suffers from higher loss and place active drivers and equalizers such as the DS64BR401 in the connectors which fit these standard module sockets. This technique is called "Active Copper" or "Active Cable" and has many benefits in less than 20 meters runs. The first benefit is cost - these cables can be less than half the cost of the fiber module and cable. The second is power - active cables can reduce the power consumption significantly if properly designed (< 200 mW vs. 400mW for fiber).
Fiber will always have a place for carrying data long distances for which it excels. However, in the data center copper wire is regaining ground with the help of active electronics may be the majority of media carrying your next stock trade! Till next time...