Interfacing multiple ADCs to a single processor for grid protection and control


As energy demand and consumption increase globally and the push for greener energy strengthens, utility companies are changing their strategies. Instead of increasing power generation, they are increasing the efficiency of power transmission and distribution by improving the quality of power delivered to customers, making the power systems fault tolerant while minimizing downtime and reducing operational expenses by extending the service life of the equipment through increased protection, monitoring, control and automation.

For example, fault-tolerant power systems reduce the available fault current and add intelligence to equipment through sensors and communication that interface to secondary protection equipment. These equipment accurately sense the fault currents and reduce the fault clearing time, enable remote operations that help identify the location of the fault accurately and faster to minimize downtime and reduce service restoration time and introduce redundancy for increased reliability on data analysis to predict and prevent equipment failures early. Primary equipment like power transmission lines, power transformers (see Figure 1), circuit breakers and load switches play a critical role in maintaining power system integrity and power supply availability.

High-end secondary equipment used includes protection relay with an AC analog input module and terminal units such as remote terminal units, distribution terminal units, feeder terminal units, and phasor measurement units for protection, monitoring, control, metering and power-quality analysis of primary equipment. Utility companies are also implementing and improving multiple protection algorithms and diagnostic schemes to protect the assets and the grid, and predict failures as early as possible.


Figure 1: Power transformer installed in a substation

Most of the sensors connected provide an analog output proportional to the parameter that it is measuring (voltage, current and/or temperature). In order to acquire the analog outputs from different sensors connected to the primary equipment, there is an increasing need for the expansion of analog input channels on the data acquisition (DAQ) system. DAQ is the process of precisely measuring and processing electrical inputs such as voltage, current, and temperature, with the ability to choose the sampling rate and compute measured parameters in real time using integrated signal processors.

Some of the key requirements for a high-performance DAQ system include:

  • Sampling analog inputs from multiple sensors (four, eight, 16 or more) using multiple analog-to-digital converters (ADCs) (two or more) to achieve multichannel acquisition and redundancy.
  • Using 16-bit, or more, precision successive approximation registers (SAR) or delta-sigma ADCs to measure electrical parameters accurately.
  • Capabilities to vary the sampling rate based on measurement or protection according to International Electrotechnical Commission (IEC) 61850-9-2 (80 samples for protection and 256 samples for measurement), along with coherent sampling of the inputs to maintain the sampling rate with varying line frequency.
  • Simultaneous sampling of the inputs to maintain the voltage and current phase angle relationship, thus simplifying protection algorithms and shortening trip times.
  • Interfacing multiple ADCs to a host processor for acquiring ADC converter-sampled digital data in real time.
  • A host processor with the capability to acquire samples from multiple ADCs simultaneously and process the samples in real time, including the computation of complex electrical parameters.
  • Optimized system cost given the increased system complexity.
  • The ability to optionally isolate the ADC interface to the host processor using digital isolators to improve system performance and reliability.

There are multiple ADC architectures available. The most popular are SAR or delta-sigma, and the interface between the ADCs and the host processor can be parallel or serial. Each host interface approach has its merits. Using a serial interface in a daisy-chain configuration provides the simplest solution, as you can daisy-chain multiple ADCs, but the limitation is reduced throughput. A parallel interface provides a higher throughput, but limits the choice of ADCs, increases cost and board complexity.

Alternatively, you can use multiple Serial Peripheral Interface (SPI) ports with independently controllable chip selects to achieve higher throughput while maintaining flexibility in sampling. The number of SPI ports required increases with the number of interfaced ADCs, which results in increased real-time processing capability requirements. This limits the use of host processors (which have limited SPI ports and real-time processing capabilities). As a result, some designers opt to use a field-programmable gate array (FPGA) with multiple SPI ports for interfacing with the ADC to achieve the required sampling flexibility and data throughput. This architecture requires an additional application processor for the human machine and communication interfaces, however, increasing system cost and complexity.

A 16-bit SAR ADC with integrated peripherals, including a programmable gain amplifier (PGA), an accurate reference, and an SPI serial interface to a host processor with a dual-core programmable real-time unit and industrial communication subsystem (PRU-ICSS) streamlines DAQ system design, as shown in TI’s Flexible Interface (PRU-ICSS) Reference Design for Simultaneous, Coherent DAQ Using Multiple ADCs. The increased integration of functions in the host processor and ADC reduces overall system cost while improving performance and reliability.

Conclusion
When you need to interface multiple ADCs to a single processor, device and architecture selection are critical to ensure a successful design. TI’s integrated circuits and reference designs simplify architecture selection and the design of multichannel precision DAQ systems requiring 16 or more precision analog input channels.

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