Part 5: Do's and Don’ts of Layout Design (cont.)
Howdy and welcome back! We are getting close to the finale…!
In my previous posts, we pieced together a system, found our components, conquered the mighty schematic and reviewed, reviewed and reviewed some more. Last time, I talked through some common layout mistakes, best practices and how we can ensure the best performance out of our printed circuit board (PCB). Due to the popularity of the post, I decided to contribute a few additional tidbits on the topic.
Know that many of these tips are engineering rules of thumb, for more details on PCB layout design you can see numerous resources available on the web.
Here are some app notes from Texas Instruments on proper layout practices and design:
The three topics we will look at today are…
1. PCB Component Placement
2. Thermal Performance
One of the most critical moments of layout design will happen before you even begin routing. Knowing where to position your components will ensure a system that is compact and performs optimally. The schematic is actually one of the best places to start determining where you should group and position components. Instead of placing components at random, try organizing your schematic similar to how you envision the layout. This will provide a starting point for when you move to the layout portion of the design. Many components, such as motor drivers, will dedicate one side of the IC’s pins for the power stage (motor, FETs, current sense, etc.) and the other side for control (GPIO, PWM, decoupling, etc.). A simple rotation of the IC can sometimes make layout much simpler.
Avoid a cluster of components where it is difficult to separate out the individual subsystems. Try to ensure that anyone reading your schematic can quickly pick out the primary function and key components.
*Image for example purposes only
Try and have clearly labeled groups or pages that show the individual subsystems of the overall design. This will help people quickly understand your schematic and potentially help someone debug your system many years in the future.
Avoid losing “flow” in your layout. By “flow” I mean, ensure that your design smoothly transitions from subsystem to subsystem. Each subsystem should maintain a compact form and then move to the next over the appropriate signals.
Signals that jump around the PCB eat up space and can be difficult to debug.
By maintaining proper “flow” you will reduce the overall board size, simplify debugging and overall have a system that performs better.
One common trick is to have traces on the top layer move in one direction while traces on the bottom layer move in a perpendicular direction. In the image below you can see the traces on the top layer tend to move in the vertical direction while traces on the bottom layer move in the horizontal direction (not visible). This avoids a scenario where a trace becomes “blocked” and can help ensure a more connected “GND” plane.
2. Thermal Performance
One critical design factor that is often forgotten till after the layout is finished is how well the design dissipates heat. All components generate heat. How much is a matter of a variety of factors. Determining the primary culprits will help to determine whether you can need active cooling (fans, water, etc.) or should utilize passive cooling (heat sinks, etc.). Generally, the main heat generators are also the components handling the most current (power MOSFETs, sense resistors, connectors, power inductors, etc.).
Here, the main generators of heat (power MOSFETs Q1-Q4, sense resistors R1-R2, motor pre-driver U1, and connectors J5-J6) are connected to minimal copper area allowing for minimal thermal dissipation.
They will limit the amount of current the system can drive and reduce overall performance.
Now, the main generators of heat (power MOSFETs Q1-Q4, sense resistors R1-R2, motor pre-driver U1, and connectors J5-J6) are connected to heavily via stitched, large copper planes.
The bottom layer is dedicated to providing additional copper area in order to improve heat dissipation.
The PCB “GND” can be the single most critical factor in the design. Grounding issues are difficult to debug, so ensuring proper design from the start can save countless hours of headache. I generally recommend that most designs utilize “GND” planes whenever possible. “GND” planes will improve heat dissipation, and reduce “GND” resistance/inductance. Although it is possible to route each “GND” trace individually, return paths or “GND” loops are often over looked. A simple “GND” place will eliminate many of the common issues that we see. This is easier done with 4 layer designs but still achievable in 2 layers designs with careful routing of the signal traces. Proper grounding is an art form and I will once again point you to the web if you really wish to dig in.
Don't / Do!
Take a look at the previous two images for an example of point to point grounding versus utilizing “GND” planes.
If you remember one thing from this, remember that Ohm’s Law is always present and current is always moving. If you understand the paths of the current, you can take the appropriate steps to manage its flow.
Thanks for reading and feel free to leave comments! You can also check out earlier installments of the series at:
For more information, you can visit the TI Motor Driver Forums. If you would like to build your own boosterpack, check out ti.com/byob!
Thanks Nicholas, another informative post.
I'm just curious, how do you like using Altium for layout, compared to other tools out there?
I've worked with PADS, Altium, and Eagle and of the three Altium is my preferred. The library functionality of Altium is where it wins out for me. Layout/schematic wise I can do what I need to in either, it is just a matter of different interfaces.
I've also worked in KiCad which is my favorite "free" software but Altium still wins out in the paid area.
As for the schematic subsystem bus approach (opinion). Have found the new TI schematics such as (EK-TM4C1294xl) launch pad difficult to navigate often spending far to much time just to determine where a signal begins and ends. Refer to the TI XDS100v2 schematic which has the 10 pin JTAG header drawn solder side up inverting pin 1 orientation, plainly confusing or even incorrect. A helpful thing would be to add direction designators (open/closed arrow heads) at the beginning and ends of trace lines. Even after many times of reviewing EK schematic, confused to find where some of the signal designators shown on separate sub system boxes lead to the MPU or other component on the main page. Not to be obstinate, the original TI schematic approach was far superior to this new look. Have been reviewing schematics for over 30 years and some of what is being done in this approach is excellent work other not so much.
I agree. Things can get confusing quickly in multi-page schematics, so even more care must be taken to maintain clarity. Unfortunately, as with coding, there are many different styles out there.
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