Cycle scavenging on C2000™ MCUs, part 1: introduction

Many engineers in the field of power electronics are developing closed-loop control systems for applications needing real-time motor control and power conversion technology. 

A closed-loop control system consists of three main stages that repeat in a continuous cycle.

  • The sensing stage, where a sensor acquires data.
  • The processing stage, where the acquired data is used by the controller to calculate compensating changes to the control output.
  • The actuation stage, where the calculated output from the processing stage is used to prompt a response.

This cycle repeats until the stable state of the system is reached. A real-time control system in essence is a closed-loop system that has a very tight time window in which to gather data, process the data and update the system to ensure stability. Missing the time window in these closed loop systems can adversely affect system stability, which in turn can have catastrophic consequences. For example, in a power electronic system, missing this time window can lead to current rush “shoot through” of the power FETs thus destroying the system board. In figure 1 you will see a real-time closed loop control power electronic system implemented on a microcontroller (MCU). 


Figure 1: Real-time control overview

One of the big challenges engineers face when designing real-time control systems is minimizing the time delay between the sensing, processing and actuation stages in order to meet the timing demands of the system. This is not an easy task, especially due to the growing number of MCUs that supposedly support real-time control.

To address these challenges, C2000™ 32-bit MCUs are built differently than most general-purpose MCUs on the market.

At the heart of their differentiation is the idea of “cycle scavenging,” where TI developed the central processing unit (CPU), peripherals and chip-level architecture to minimize the time (in CPU cycles) from sample acquisition to CPU processing to pulse-width modulation (PWM) updating. These MCUs incorporate a variety of features geared toward “scavenging” CPU cycles at each of the three main stages in order to minimize the sample-to-output latency, thereby meeting real-time control-loop performance demands.

In this seven-part series, I will take a closer look at these features and how they enable C2000 MCUs to scavenge cycles at each of the three stages. In the second installment, I will discuss the sensing stage and focus on two cycle-scavenging features built around C2000 analog-to-digital converter (ADC) modules: ADC zero-wait transfers and multiport reads.