Are you heading to Silicon Valley next week for Design West and Multicore Developer's Conference? If you want to DO MORE WITH MULTICORE, you won’t want to miss these sessions. Our multicore experts will be there to provide training and insight on a variety of multicore topics, from achieving maximum performance to scalability to overcoming the challenges of multicore programming.
Here’s a look at what TI’s multicore team will be doing the show. Mark your calendar!
10:45 – 11:30 a.m. Panel: Effective Multicore - Commonplace or Just for the Elite Developer? (Hilton Almaden Ballroom)
3:15 – 4:10 p.m. Training Session: Achieving maximum multicore performance on TI’s KeyStone devices (Booth #2440)
This session provides an overview of the unique architectural hardware elements and software support for TI’s multicore DSPs and SoCs. The speaker will discuss the specific hardware elements that support multicore operations in TI’s innovative KeyStone architecture, as well as the supporting software elements. He will also present a compelling and comparative demonstration of a very large floating point fast discrete Fourier transform (DFT) on multiple cores using TI’s TMS320C6678 Evaluation Module (EVM).
4:30 – 5:15 p.m. Panel: How Many Cores Does it Take to Reach the Singularity (Hilton Almaden Ballroom)
10:45 – 11:30 a.m. Session: Overcoming the Challenges of AMP Multicore Programming (Hilton Almaden Ballroom)
1:25 – 2:00 p.m. Keynote: "Infinite" Scalability in Multicore Processors (Hilton Almaden Ballroom)
2:50 – 3:35 p.m. Session: Efficient and Effective Software Deployment of LTE Basestations on Multicore SoCs (Hilton Almaden Ballroom)
Also, be sure to stop by Booth #1320 for a look at our cool demos. The countdown is on and we can’t wait! What are you most excited for at Design West and Multicore Developer's Conference?
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