I recently had to switch offices and the colleague whose office space I inherited left me a gift: a poster from when TI unveiled the industry’s first 10 GHz DSP. “A perfect 10!” it reads, maybe alluding to the highest score an Olympic athlete can obtain in some gymnastic disciplines. 320 GMACs and 160 GFLOPs, combined fixed- and floating-point capabilities, up to eight cores, and low power across all applications, it continues. Moving into my new office the gift of my predecessor reminded me how I once tried to impress my father-in-law, the dean of the library at a liberal arts college in Oregon and only loosely familiar with the concept of digital signal processing, with 320 GMACs and 160 GFLOPs.
From my in-laws’ living room window you not only see the beautiful scenery of the Pacific Northwest, in the distance one can also spot a cellular macro base station. “Great,” I thought glancing out of the window and having just been presented with a formidable example of how to put 160 GFLOPs to work.
In an LTE-Advanced system, the latest 4G cellular communications standard, I told him, the physical resources a base station can use to transmit data to mobile subscribers are grouped into up to 100 “blocks.” And a modern macro base station has to be able to serve hundreds of users within one cell or sector of the network, I explained. How much data a base station can transmit to a given user and how long that user has to wait for her data—in other words how happy the customer is with her wireless operator—depends to a large extent on the scheduling software that runs on the base station hardware.
In more figurative words I tried to illustrate that every thousandths of a second, the base station has to decide who of the mobile users gets how much of the physical resources taking into account the application and past data traffic of and the current condition of the wireless channel to each individual user. In other words, 1000 times a second 100 resource blocks need to be assigned to hundreds of users. He surely was amazed by the amount of computations a cellular base station has to perform in such limited time. And of course I told him that TI’s KeyStone family of TMS320C66x multicore devices is a perfect fit to simplify and accelerate such an onerous task due to the native floating-point support and the specialized instructions for efficient matrix inversions. In fact, the search and sort algorithms used in Layer 2 scheduling execute very efficiently on TI DSPs.
Did I choose a wireless cellular base station as an application example for high-performance multicore processors by accident? Probably not. The demands of the communications infrastructure market have long driven the envelope for the industry’s highest-performing fixed- and floating-point DSPs and TI’s latest infrastructure devices for LTE-Advanced continue to do so.
Will my children one day use a wireless cellular base station to illustrate the performance of a TI multicore processor? I am convinced they could. But technology has proven over and over again that as the performance of processors increases new markets emerge for them. One can only wonder what applications our children will find for low-power high-performance multicore processors but the opportunities seem endless. Particularly now that the eight DSP cores got some company on the chip: four ARM Cortex-A15 RISC cores.
A perfect 12. What will our children use it for?
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