Much like a small, yappy dog that lives in a celebrity’s purse, watchdog timers are often considered unnecessary or excessive. To equate the two, how ever, would do a great disservice to the watchdog. Unlike “purse dogs,” watchdogs add critical monitoring features that allow you to internally and externally monitor your system for failure and take action should that happen.
Just what is a watchdog timer?
Simply put, a watchdog timer is a device that asserts a reset output if it has not received a periodic pulse signal from a processor within a specific time frame. One way this is implemented is by a digital signal output (GPIO) from the processor feeding into the watchdog input (WDI) of an external watchdog timer as shown in Figure 1. TPS3851 is a supervisor with an integrated watchdog timer. This allows it to both supervise the supply rail to the microcontroller and monitor the digital pulse emanating from the MCU in an external fashion.
Figure 1: Watchdog monitoring provided by the TPS3851
The processor periodically sends a pulse to the watchdog timer to indicate that the system software is operating properly. If the watchdog timer does not receive this pulse within an allotted time frame (known as the watchdog timeout), the watchdog timer asserts a reset output. This reset output can be used to notify the system that the processor has experienced a hang or a freeze, or to reset the processor itself. Figure 2 illustrates a pulse received within the watchdog timeout and a pulse received after the watchdog timeout has expired.
Figure 2: Operation of a standard watchdog timer
Why are watchdog timers so important?
Watchdog timers provide a method for alerting a system or resetting a processor whose software has experienced a freeze or hang. While no one purposely designs software to freeze, good system designers plan for failures anyway – as it’s always better to prepare for the unexpected. Without this monitoring, the processor could stay frozen indefinitely and lead to further system failure. An external watchdog timer with an adjustable timeout interval, such as the TPS3851, can identify these software freezes within just a few milliseconds and reset the system or processor appropriately. This functionality is especially necessary in embedded or remote systems where manually resetting the system isn’t practical or even possible.
How can I implement a watchdog timer in my embedded system?
There are two primary methods for implementing watchdog timers:
In principle, the functionality of a watchdog timer is not overly complicated. However, its importance in maintaining the reliability of systems cannot be overstated. This is especially true if a human-initiated system reset in case of failure is not possible or very difficult.
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