I’ve heard that there are at least seven reasons to eat, and only one of those reasons is hunger. In the same way, there are many reasons for switched-mode power supply (SMPS) instability, and only one of those reasons is a control loop with an insufficient gain or phase margin. In this six-part series, I will offer some tips about identifying the causes of these instabilities and how to fix them.
Reaching for a network analyzer to measure the loop response and study the gain and phase margins may in fact be the correct path to a solution (just as we sometimes eat because we are actually hungry), but there are quite a few situations where a gain and phase plot won’t help at all.
In all cases, the first thing you should do is look carefully at the instability, study its characteristics and use that information to deduce the likely cause.
Let’s look at control-loop instability first, because – despite what I said above – a control loop with a sufficient gain and phase margin is a necessary but not sufficient, condition for SMPS stability.
You designed your circuit to have the required gain and phase margins in order to meet your design targets and provide a stable control loop. Bode plots show the gain and phase margins in the frequency domain. The load transient response is easier to measure and gives a good qualitative indication of system stability in the time domain. The load transient response is in some ways a better indicator of system stability because it indicates the large-signal response of the system, in contrast to the small-signal response of the Bode plot. Figure 1 shows a typical Bode plot and transient response for a boost power factor correction (PFC) stage.
Figure 1: Typical loop response: Bode plot (a); transient response (b)
There are several nonlinearities in an SMPS control loop that can alter the loop gain and phase enough to change a stable loop into an unstable one:
Diagnosis and solution
Control-loop instability causes an oscillation at the loop crossover frequency (0dB gain). Ideally, the oscillation is sinusoidal, but there may be some distortion present due to nonlinearities in the system. Here is what you might see:
One approach to finding a solution is to slow the loop down, take Bode plots, study the results and recalculate the compensation networks, iterating as necessary. Don’t confuse a control-loop oscillation with an input-filter oscillation. (I’ll discuss this in a later installment of this series.) Does the oscillation persist if you short-circuit the input-filter inductors or the system become unstable due to the increase in gain as it moves from DCM to CCM?
Note that the output of a boost PFC stage will always have a sinusoidal ripple voltage at twice the line frequency. This is inherent in the topology and should not be confused with control-loop instability. The ripple is the reason that the boost PFC control-loop bandwidth is normally limited to between 7Hz and 10Hz.
There could be many reasons why your SMPS is unstable. In later installments of this series, I will look at some of the more common causes of instability, although my list will be far from complete.
Here are the upcoming installments I’ve planned:
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