An introduction to the D-CAP+™ modulator and its real world performance

The D-CAP+™ control architecture is optimized for multiphase regulators. Like the standard D-CAP™ control scheme, the D-CAP+ architecture is also a constant on-time architecture, but it’s implemented using a true current-mode design. This enables it to properly sense and balance inductor current between multiple phases of a switching regulator. The controller’s on time is also adaptive to operating conditions such as input voltage, output voltage, and load current, resulting in a constant on-time and fixed frequency in steady-state conditions. Some of its many benefits include:

  • High loop bandwidth and phase margin for fast transient response.
  • Stability that is insensitive to load current, input voltage and number of active phases.
  • Dynamic phase add/drop capabilities to keep performance and efficiency at peak levels.
  • Accurate current sharing to avoid stressing the components of any one phase and maintain regulation.

Figure 1 gives a basic overview of the D-CAP+ architecture. The pulse-width modulation (PWM) comparator and adaptive on-time circuitry form the heart of the modulator, with inputs from the voltage and current loops outlined in green and red, respectively. Additional phase-management circuitry turns the individual phases on and off.

Figure 1: D-CAP+ Architecture Block Diagram

Figure 2 shows the basics of how the modulator operates in steady state. The sensed inductor current waveform of all phases, ISUM, is compared against the output of the error amplifier, EA. The intersection of ISUM and EA generates a constant on-time PWM pulse to start a switching cycle. The phase-management circuit fires each phase sequentially in order to keep the phase currents balanced. For a fixed VIN, VOUT and IOUT, the switching frequency of the regulator will remain constant.

Figure 2: D-CAP+ operation in steady state

During a transient event, the D-CAP+ modulator maintains output regulation by keeping a relatively fixed on time while increasing or decreasing the switching frequency by adjusting the off time as needed. Figure 3 shows this behavior.

Figure 3: D-CAP+ transient operation

TI benchmarked the transient response of a competitor’s digital current-mode modulation scheme against the TPS53679 D-CAP+ multiphase regulator. The conditions of the benchmarking were:

  • VIN = 12V, VOUT = 1V, fSW = 400kHz, six phases.
  • IOUT = 0A to 150A, 1kHz, D = 5% to 30%.
  • Matched output filters.
  • Optimally adjusted compensation.

Figures 4, 5, and 6 show the scope shots of the testing, while Table 1 summarizes the measured overshoot, undershoot and settling times. In all of the scenarios studied, the D-CAP+ topology offered lower over/undershoot with comparable settling times to the competitor and emerged as the clear victor.

Figure 4: Transient Benchmarking – Undershoot

Figure 5: Transient Benchmarking – Overshoot


Figure 6: Transient Benchmarking – Duty-Cycle Sweep


Table 1: Transient Results Summary

TI also looked at the phase-firing behavior of each solution on the bench as well; see Figure 7. D5 = PWM1 for the competitor’s part, while D0 = PWM1 for the TPS53679. As expected, the TPS53679 and D-CAP+ modulator showed a constant on time with a shortened off time during the load step. The competitor’s controller overlaps active phases by adjusting the PWM on time instead. Even with four of six phases overlapped, the competing device still cannot beat TI’s D-CAP+ control scheme.

Figure 7: Phase-Management Comparison During Load Step

The results are in and when it comes to your next high-powered design the choice is clear. Take your next ASIC or processor design to the next level with one of the many D-CAP+ switching regulators from TI. Stay on the lookout for more Power House blogs exploring other benefits of the D-CAP+ modulator.

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