The Signal

Grounding Principles

2013-05-21T17:26:00Z

In a previous blog on supply bypassing, I cautioned that poor bypassing could increase distortion of an amplifier. A reader, Walter, asked an interesting question… where should you connect the ground of a bypass capacitor to avoid problems?

This raises questions regarding proper grounding techniques. Wow. Big topic, but I may be able provide some insight with a couple of simple examples.

Figure 1 shows inverting and non-inverting amplifier stages with unintended, parasitic resistance or inductance in the ground connections (highlighted in red). The nodes A, B and C are all intended to be ground. But if current flows in parasitic ground impedances, these nodes will not be at the same potential. It is these parasitic ground impedances that can allow distorted ground currents to contaminate signals.

Walter’s specific question was, “where should you connect the bypass capacitor [the ground side].” It’s an important point. The currents flowing in op amp supply terminals (and therefore the bypass capacitors) may be distorted because they represent only half a sine wave. If distorted (or other interfering) current flows into a vulnerable ground node it can increase the distortion (or other errors) of the amplifier.

An interfering or distorted current flowing into node_A directly affects the ground reference of the input signal, summing in an error. Likewise, a ground current injected into node_B serves as a direct input to the amplifier stage (inverted, in the first circuit). Ground current flowing into node_C directly sums an error with the output voltage. This node may be less vulnerable because the error signal is not amplified by the circuit gain.

The bypass capacitor should be connected to node_G. Though there may be additional parasitic impedance on its way to other ground points, variation in voltage at node_G affects the critical nodes equally, so it does not inject an error or distortion. I’ve shown an op amp with a single power supply. The ground connection of the op amp (shown on top of the op amp) should also connect to Node_G. A dual (±) supply op amp circuit would have another bypass capacitor for the negative supply and it, too, should connect to node_G.

A solution is to create a circuit board that establishes a ground with the characteristics of node_G. The principle is simple—the circuit trace from the input ground terminal to the ground side of R1 should be a clear path with no connections to contaminating sources of current along the way (figure 2). This input ground trace can join a larger ground connection or ground plane where they meet. With some gain in this stage, output errors are less critical, but you still may want a separate trace to the output terminal connections.

The input ground connection should not connect to equipment chassis at an input connector. This would create an opportunity for other interfering ground noise (such as AC mains ground currents) from impressing current on the clean input ground trace.

A single blog cannot begin to cover all the issues relating to the art of grounding. Woops… did I call this an “art?” It’s science, not art! While, at times, may seem like black magic, Ohm’s law is always at work. Considering where ground currents flow and how they could affect the circuit is always a good start!

Thanks for reading. Comments welcome below,

Bruce

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Handy Gadgets and Resistor Divider Calculations

2013-05-13T23:34:00Z

Handy gadgets make our engineering life easier—the little special purpose computer programs or spreadsheets that you might find or create yourself.

Back in the old days, engineers used nomographs. These are graphical aids that solve common multivariable problems of all sorts. Calculators and desktop computing caused their decline so you seldom see them today. I still use a variant of one—an old cardboard R-L-C reactance slide rule given to me in my first electric circuits class back in the ‘60s. It helps me find approximate values in the right impedance range when I’m positioning poles and zeros. I think better with it in my hands.

I believe that the graphical nature of a nomograph can aid in visualization and optimization. Has something has been lost when we just plug numbers into a computer?

In previous blogs, I’ve provided gadgets for calculating op amp noise and 1/f noise. Here is another, an Excel sheet that calculates resistor values for a three-resistor divider with a voltage reference to offset the output voltage. For example, if you have a -10V to +10V input and you want attenuate and shift it to a 0 to 3V output, this gadget calculates the resistor values.

(Please visit the site to view this file)

It’s a sub-circuit that is often needed in signal processing. The math is a bit messy, so if you solve it once you probably don’t want to do it again. It’s the type of task that is worth the time to create a gadget. The equations are in figure 2, if you don’t want to use the worksheet. I refined it a bit, adding some checking for out-of bound values and minimum required value for the reference voltage. Try it and see. With the annotations I think you’ll find it easy to use.

Excel (or equivalent) is pretty handy for calculations like this but I find it awkward for some types of programs. I have some gadget programs that parse long files to manipulate data. I’ve used various forms of BASIC for this through the years but now I use Excel’s Visual Basic (macros), loading data into the associated worksheet to use its graphing capabilities. I wouldn’t publish these gadgets. Excel macros are so easily written or modified to create serious damage that they’re scary. I only give them to close associates and I’m not even sure they trust me. :-)

What handy gadget design aids have you made? What ones do you wish you had? Do you use any old-style nomographs or slide-rules like mine?

Thanks for reading and your comments are welcome below,

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

Check out 60 other interesting topics.

Chopper Op Amps—are they really noisy?

2013-05-06T11:56:00Z

Chopper op amps offer very low offset voltage and dramatically reduce low frequency 1/f (flicker) noise. How do they do it? Here’s a quick-read on the tricks.

Click Here to read on EDN Magazine site.

Bypass Capacitors… yes, but why?

2013-04-23T17:13:00Z

Everyone knows that op amps should have power supply bypass capacitors located near the IC’s terminals, right? But why? Why, for example, is an amplifier more apt to oscillate without proper bypassing? The reasons will increase your understanding and awareness.

Power supply rejection is an amplifier’s ability to reject variations in the power supply voltage. Figure 1, an example, shows that this rejection capability is very good at low frequency but diminishes as frequency increases. Hummm... poorer rejection at high frequency where oscillations occur?

We often think of external power supply-borne noise interfering with an amplifier. But op amps can create their own problems. For example, output load current must come from the power supply terminals. Without proper bypassing the impedance at a supply terminal can be high. This allows AC load current to produce an AC voltage on the supply pin. This creates an unintended, uncontrolled feedback path. Inductance in this power supply connection can magnify the resulting AC voltage at the supply pin. At high frequency, where power supply rejection is poor, this unintended feedback can cause oscillation.

There are internal forces at work, too. Without a solid power supply, internal circuit nodes may talk to one another creating unwanted feedback paths. Internal circuitry is designed to operate with firm, low impedance on the power supply terminals. An amplifier may behave quite differently and unpredictably without the solid base of low impedance supplies.

With a clean sine wave input, the unintended feedback due to poor bypassing may not be a tidy sine wave. The signal currents in the supply terminals, figure 2, are often highly distorted because they only represent one half of sine wave current. With different power supply rejection characteristics on the positive and negative supplies, the net effect will distort the output waveform.

The issues are magnified with high load current. Reactive loads create phase-shifted load currents that may exacerbate issues. Capacitive loads are already at higher risk of oscillations due to additional phase shift in the feedback path (more detail here). These higher risk cases may need higher value tantalum bypass capacitors and extra care in circuit layout, compact and direct.

Of course, not all poorly bypassed amplifiers oscillate. There may not be sufficient positive feedback, or the phase not quite right (or wrong!) to sustain an oscillation. Nevertheless, performance may be compromised. Frequency and pulse response may be affected with excessive overshoot and poor settling time.

As discussed in a previous blog, these behaviors are not well-modeled in TINA-TI or other SPICE programs. Voltage sources in SPICE are perfectly solid, unperturbed by load currents. Modeling the actual source impedance of your supply and board layout with additional components is tricky and imprecise. Power supply rejection magnitude is modeled in our best macro-models, but the phase relationship of this feedback path is unlikely to match reality. Simulation can be tremendously useful but won’t accurately predict this behavior.

All this should not cause you to be paranoid—no need to go crazy with bypassing. Just be alert to particularly sensitive situations and signs of potential problems. Good analog design thrives with a healthy dose of understanding and awareness. :-)

Thanks for reading and comments are welcome below.

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

Look here… 55+ other interesting technical topics The Signal blogs.

Rail-to-Rail Inputs—what you should know!

2013-04-16T17:03:00Z

Rail-to-Rail (R/R) op amps are extremely popular, especially useful with low supply voltage. You should know how R/R inputs are accomplished and understand some trade-offs.

Figure 1 shows a typical dual-input R/R stage comprised of both N and P-channel transistor pairs. The P-channel FETs handle the signal through the lower portion of the common-mode voltage range, to slightly below the negative rail (or single-supply ground). The N-channel FETs operate with common-mode voltage near and slightly above the positive rail. Additional circuitry (not shown) directs traffic, determining which input stage signal is processed by the next stage. Most of our dual input stage op amps are designed so that the transition occurs approximately 1.3V from the positive rail. Above this voltage, there is insufficient gate voltage for the P-channel stage so the signal path is redirected to the N-channel stage.

The P and N input stages will have somewhat different offset voltages. If the common-mode voltage moves through this transition (as it does with R/R G=1 operation), it creates a change in the offset. Some op amps are factory trimmed by laser or electronic trimming, adjusted to reduce the offset of the input stages. This reduces the change through the transition but still leaves a residual bobble. The circuitry controlling the transition from P to N input stage is referenced to the positive supply voltage, not ground. On a 3.3V supply the transition moves to an awkward point—mid-supply.

While unnoticed in most applications, this change in offset voltage may be an issue if high accuracy is required. It can also cause distortion in AC applications. But, again, this will only be seen if the common-mode input voltage crosses the transition between stages.

Figure 2 shows a second type of R/R input stage. An internal charge pump boosts the voltage powering a single P-channel input stage to approximately 2V above the positive supply rail. This allows a single input stage to perform seamlessly over the full rail-to-rail input voltage range—below the bottom rail to above the top rail. No transition glitch.

Charge pump… it sounds spooky to some designers. They’re noisy, right? But our most recent ones are remarkably quiet. Very little current is required because it’s only powering the input stage. There are no extra pins or capacitors—it’s all internal. Charge pump noise is below the broadband noise level; rarely can it be seen in the time domain. Applications that analyze the spectral response below the broadband noise level, however, may see some artifacts.

Not all applications need an op amp with R/R input. Inverting op amp circuits or amplifiers in gain greater than unity, for example, often do not require R/R input, yet still have R/R output. (Maybe this needs another blog.) Do you really need a R/R-input amplifier? Many engineers prefer to use them so they don’t need to worry about exceeding the common-mode range. They use the same op amp in various points in their system—some needing R/R input, others not. Whatever your choice, with knowledge of the R/R types and tradeoffs, you can select more wisely. If in doubt, you are welcome to ask us on our E2E forum.

Here are a few example op amps:

OPA340 Two-Input Stage, Trimmed Offset, 5.5MHz R/R CMOS
OPA343 Two-Input Stage, Untrimmed Offset, 5.5MHz R/R CMOS
OPA320 Charge-pumped Input Stage, Trimmed Offset, 20MHz R/R CMOS
OPA322 Charge-pumped Input Stage, Untrimmed, 20MHz R/R CMOS

Thanks for reading and your comments are welcome.

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

Check out 55+ other interesting technical topics… The Signal blogs.

Op Amps… G=1 stable & decompensated

2013-04-07T23:15:00Z

You have voted. Unity-gain-stable op amps won in a landslide—they’re far more popular than decompensated op amps. What’s this all about?

Click Here to read on EDN Magazine site.

Paralleling Op Amps—is it possible?

2013-03-26T12:59:00Z

Is it possible to parallel two op amps to get twice the output current?

We get this question periodically on our E2E forums. Though we may answer with a qualified “yes,” it tends to make us shudder just a bit. It can be done… but with great care. So let me come quickly to a key point. Don’t use the simple circuit on the left. Directly paralleling inputs and output of two op amps is sure to start a serious argument between the two. Differing offset voltages will cause them to fight over the correct output voltage. They may burn all their output current capability in the battle with one output current (sourcing) flowing into the other (sinking current).

Figure 1b has a chance. Op amp A1 is the “master” and A2 is the so-called “slave,” replicating the output voltage of the master. R3 and R4 promote reasonably equal sharing of the load current, even though A2’s output may be slightly different. Feedback is connected on the load-side of R3 and R4 so their voltage drop is corrected. You lose some output voltage swing capability in the I∙R drop on these resistors so you will be tempted to make them low in value. But the offset voltage of A2 will cause extra quiescent current equal to Vos/(R3+R4). It’s a tricky tradeoff.

Be very cautious with high speed signals. You want A2 to accurately replicate the output of A1. If the signal moves too fast, the phase shift of A2 will cause differing output voltages and wasted current. It’s important to avoid slewing. If necessary, add an R-C filter at the input so the fastest rate of change on the output of A1 is well below slewing speeds. The dynamic behavior of two amplifiers may not match well during slewing.

Don’t use older generation op amps that have output inversion (phase reversal) behaviors. If A1 can overdrive the input common-mode range of A2 and its output inverts the result is ugly.

Above all, check the behavior of your circuit thoroughly. SPICE may tell you whether you have a basic working circuit, but op amp macro-models may not accurately predict the quirks that could befall this circuit. Build a breadboard and check all signals and conditions carefully. If your op amp is multi-sourced, consider that not all manufacturers’ devices behave exactly the same. (But, of course, you have only one source for op amps, right?)

Do you think I’m a bit leery of paralleling op amps? Well, yes… call me leery. It can be successful but proceed with caution. I recommend that you consider an easier path—using an op amp with more output current. Here are a few possibilities:

TLV4111 300mA, 6V. CMOS Op Amp.
BUF634 G=1 buffer, 200mA, 36V. Used inside the feedback loop of standard op amps.
OPA547 500mA, 60V Op Amp. Adjustable current limit.
OPA564 1.5A, 24V Op Amp, 17MHz GBW.
OPA548 5A, 60V Op Amp. Adjustable current limit.

Have you successfully paralleled op amps? Or do you have scars from trying? Comments welcome.

Thanks for reading,

Bruce email: thesignal@list.ti.com

Table of Contents… with 50+ other interesting technical topics.

Resistor Puzzle Solution... and a rant on schematics

2013-03-19T01:33:00Z

Did you see last week’s resistor puzzle? Check it out if you missed it. Here’s the solution:

We’re not accustomed to reading three-dimensional schematics so the first step is to redraw it clearly. There are three distinct paths from A to B, colored blue, green and red. Each has a series connection of 1Ω—R—1Ω. The 3Ω resistors are effectively in parallel with the “R” resistors. The symmetry of these 3Ω resistor connections makes their effect the same as if each is directly in parallel with one of the “R” resistors.

The total resistance from A to B is 1Ω, so each of the three legs must be 3Ω. With 1Ω on each end of the legs, the middle parallel combination must also be 1Ω. So R must be 1.5Ω in parallel with 3Ω to make 1Ω.

Was this fun? Maybe you missed a previous puzzle, the infinite resistor network. More fun.

It’s all so much easier when we have a well-drawn schematic. Huummmm… a well-drawn schematic?

A genius former colleague in my past used to say “circuits work better when the schematic is drawn right.” He didn’t mean “drawn without errors.” He meant that it was easier to understand the circuit when it was drawn well. Nuances are easier to discern, details more easily optimized and problems are more easily resolved. So true!

I’m on my soapbox now! Have pride in your schematics. A well-designed circuit deserves a well-drawn schematic. And a poorly drawn schematic does not inspire confidence in your work.

Take care in laying out your schematic. Signals flow better left-to-right, you know. Currents flow downward. With thoughtful layout, you can minimize confusing crossovers and labeled interconnections that hinder interpretation. If you need multiple pages, make connections clear, preferably so one sheet can lie next to another and connections are obvious. Draw sub-circuits the same way each instance they occur so they are easily recognized.

Use familiar symbols. Op amps are triangles not rectangles—much easier to read this way. When possible, place components in a way that suggests a good circuit board layout. Draw symmetrically if this is desirable in the PCB layout. Label IC part numbers and include all circuit values. Number components so that they can be identified easily in e-mails or phone conversations.

So often, I see schematics without a single word of helpful annotation. A few words of explanation can add so much! A footnote explaining why a certain component is chosen or how a value is calculated can be so valuable to a support engineer a few years later. How about labeling some nominal voltages at key nodes? Show gain values and nominal signal levels. Label major blocks. If you last as long as I, you may be the beneficiary of your own good documentation as you retrace your own steps.

Some thought and empathy will make life easier for those who later must decipher your circuit. Make the quality of your schematics a signature feature of your excellent work. Oh, yes… signature! A valued colleague here at TI insists that you should put your name on your schematic. (Thanks, Jim.) You may find that this simple act will cause you to recheck your work one last time. ;-)

Schematics… what’s your pet peeve? What’s your rant? Leave your comments.

Thanks for reading,

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

Check out 50+ interesting topics… Table of Contents for all The Signal blogs.

Resistor Puzzle—the sequel

2013-03-12T03:18:00Z

It’s time for some fun! I’ve known a few folks who have tormented colleagues with a resistor cube—equal resistors on all sides. So in case you’ve solved that one, let’s add a twist. In this cube, not all the resistors are equal. The resistance from A to B is 1Ω. Resistor values are indicated, except for those marked “R?” in red. What is the required value for R?

Spoiler alert! We’re sure to get the answer posted in reader comments below. No peeking. ;-)

This blog marks #53, the start of a second year. It’s been great fun and a challenging gig. A week feels like three days! In the coming months, I may skip a week here and there. It will give me a chance to catch my breath… and maybe do some grandfathering, too.

I’d also like to ask for your topic suggestions. I still have a list of my own but I’d like to respond to your ideas. Of course, your suggestion could lie outside my knowledge or experience so no promises. You can post in comments below or send me an email.

And BTW… If you enjoy quizzes, here’s another, a non-technical one for your amusement.

Thanks for reading,

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

Check out 52 other interesting topics… Table of Contents for all The Signal blogs.

1/f Noise—the flickering candle

2013-03-03T22:59:00Z

The 1/f (one-over-f) low frequency noise region of amplifiers seems just a bit mysterious. Reader “tweet” asked for a discussion of 1/f noise—a challenging topic for a short blog.

Click Here to read on EDN magazine web site.

Excel noise calculation file here… (Please visit the site to view this file)

Note: This file is different than the one posted a month ago.

Simulating Gain-Bandwidth—the generic op amp model

2013-02-26T13:28:00Z

It may not always be obvious how the gain-bandwidth product (GBW) of an op amp may affect your circuits. Macro-models have a fixed GBW. Though you can look inside these models, it’s best not to tinker with them. What to do?

You can use a generic op amp model in SPICE to check your circuits for sensitivity to GBW. Most SPICE-based circuit simulators have a simple op amp model that you can easily modify. TINA’s is shown in figure 1.

First, set its DC open-loop gain to 1M (120dB). Then, a dominate pole frequency (entered in Hz) will create a GBW of the amplifier in MHz. In this example, a 10Hz dominate pole creates a GBW of 10MHz. Figure 2 shows the open-loop response for three different gain-bandwidths, 5MHz, 10MHz and 100MHz.

Note that that this simple model also includes a second pole (some folks call it a nuisance pole). In some cases, you may want to make this second pole a very high frequency such as 10GHz. This will create an ideal 90° phase margin for any reasonable GBW. In this example, I set the second pole at 100MHz, equal to the highest GBW that I’m simulating. You can see the effect of this second pole in the 100MHz GBW response, causing the open-loop response to bend downward at 100MHz. It causes the unity-gain bandwidth to pull in to approximately 78MHz, similar to what you might see with a real op amp of this GBW. Unity-gain bandwidth and GBW of a real op amp are not necessarily the same number. (Does this need another blog?)

Active filter designs can be tricky to judge GBW requirements and are a good case for use of this technique. FilterPro, used to design the Chebyshev¹ filter in figure 3, provides GBW recommendations but its guidelines may be more stringent than needed in some circumstances. For this design, it recommends a 100MHz or greater GBW to achieve nearly ideal filter design characteristics. I simulated the design using the three gain-bandwidths shown in figure 2, 5MHz, 10MHz and 100MHz. With these results you might decide that a GBW less than 100MHz could be satisfactory. For final simulations, you should use the macro-model for the op amp you select.

I used the parameter stepping function in TINA, varying the dominate pole to change the GBW. Other simulators have similar capability. Of course, parameters could be changed manually, too. Either way, varying the GBW of a generic op amp model will give you insight on its effect in your circuits.

Have you used a generic op amp model to vary other parameters? Comments welcome.

Bruce email: thesignal@list.ti.com (Email for direct communications. Comments for all, below.)

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Simulations use fee TINA-TI. Filter designs use free FilterPro.

Note 1: Geek fact—Chebyshev (Чебышёв) was a Russian mathematician who died in 1894. Use of his polynomials to create equal-ripple filters came later.

ESD… Zapp!

2013-02-19T13:38:00Z

We’ve included device-level ESD performance of our ICs in data sheets for many years. But these figures apply to an integrated circuit before soldering onto your circuit board. What about ESD tolerance on your PCB?

We qualify the ESD performance by zapping each pin multiple times on several devices. It simulates nasty mistreatment that might occur during handling and assembly. Without internal ESD protection circuits, damage could occur with static charges as low as 10V.

But you’re also concerned (maybe more concerned) with ESD tolerance after PCB assembly and during operation. An IC is generally much more robust after assembly on a circuit board. Power supply connections have bypass capacitors that can absorb sizable discharges. Input and output connections to the board generally have series resistance and PCB trace inductance. Capacitance to ground, even if only from the PCB trace, increases the ability to absorb a static discharge without damage.

You can add additional diode clamps or zener-like protection devices¹ that will greatly improve ESD tolerance of your complete product or equipment. Figure 1 shows a basic approach—and more information here.

This is about survival of your circuitry but you should also consider functional disturbances. This might include gross overloads of analog circuitry that require a long recovery time. Scrambled bits in digital circuitry or the system processor could be an even bigger problem. You probably cringe as I do when you draw a static spark as you touch your PC. Even though there may be no permanent damage to the hardware, an ESD “hit” can cause a system reset or lost data. You, with analog skills, may be the best person to guide the PCB layout, system layout and grounding to assure your system or product can withstand a zap without lost data or reboot.

Deliberate planning and execution will help achieve good results. Think about where the current flows during a static discharge. Consider both polarities of current flow to assure a safe current path.

It’s best to confine the discharge current path close to entry point. A discharge to the input ground terminal should find an easy path to earth ground without snaking around your circuit board. Keep the current path away from parallel lines that could be disturbed by capacitive or inductive coupling. A discharge to the input terminal must find a current path to ground. The diode clamps shown in figure 1 provide a short path to the power supplies, then through the bypass capacitors to ground.

Consider the same issues for an output terminal or any other likely point of conductive contact with your product or equipment.

With careful design and thoughtful PCB layout, you can improve the ESD tolerance of your system, including survival and functional tolerance. If you have big problems, we have an expert available for consultation. Jae Park has helped numerous customers sort out difficulties in their boards and systems. Reach him through our E2E forums specific to the product type relating to your issues.

Have you solved a tricky ESD sensitivity problem? Tell us how, below.

Bruce email: thesignal@list.ti.com (Email for direct communications.)

Check out other interesting topics… Table of Contents for all The Signal blogs

Note 1) In a prior blog on EOS protection, I lamented that many protection devices had too much leakage current for many precision circuits. These new 5V protection devices have lower leakage.

Op Amp Noise—but what about the feedback?

2013-02-10T16:00:00Z

Last month we explored noise of the non-inverting amplifier but I dodged the issue of the feedback network’s noise contribution. A reader, Jim, challenged me—he wanted more detail. So what about the noise from the feedback network?

Click Here to read on EDN magazine web site.

Excel noise calculation file here…(Please visit the site to view this file)

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The Inverting Attenuator, G = -0.1… is it unstable?

2013-02-05T02:35:00Z

Unity-gain-stable op amps are stable in a gain of one or greater, but not less, right? What to do?

This question appears on our E2E forums periodically. Okay, here’s the short answer… an inverting attenuator is stable! You want to know why, right? There are a couple of ways to look at this issue and a quick look may add clarity to general stability issues.

Consider this: If G = -0.1 were unstable, then even lower gain should be worse, right? Let’s draw a circuit—a unity-gain amplifier with a 1Ω feedback resistor, figure 2. Then consider possible circuit board leakage forming an input resistor, R1=10GΩ. This is a stray “input signal” amplified at very low inverting gain. Is it unstable? Certainly not. It’s just a unity gain buffer with virtually no input. Stable.

Think of the stability of an op amp as related to how much output signal is fed back to the inverting input. Stability experts refer to this feedback factor as β, (beta). In unity gain, 100% of the output voltage is returned to the inverting input, so β is 1. The example in figure 2 is essentially the same with nearly all output signal fed back to the inverting input.

Figure 3a shows an inverting amplifier and 3b shows a non-inverting amplifier. The circuits are the same; the input signal is just applied to different nodes. Both circuits return the same amount of output signal to the inverting input so their stability behavior is the same. Beta is the same.

Op amp wonks also use the term noise gain—so-named because the op amp’s voltage noise is amplified to the output by this factor. It’s just another way to quantify the amount of feedback. An op amp circuit prone to oscillations or instability is incited by its own internal noise, amplified and fed back to the inverting input. The inverting amplifier, figure 3a, has the same noise gain, β and therefore the same stability behavior as its non-inverting cousin, even though the input signal gain is different.

Are there circuits with noise gains less than one? Is β ever greater than 1? Noise gains less than unity and β greater than 1 occur when gain is included in the feedback loop. Multiple amplifiers in a larger feedback loop such as a control system can face this issue. It also occurs when a transistor (common-emitter or common-source configuration) is included inside the feedback loop of an op amp. These circuits can have tricky stability problems.

Of course, there are other possible causes of oscillations or instability in an inverting attenuator. Capacitive load, excessively high resistor values or too much capacitance at the inverting input can cause instability but these are unrelated to the basic inverting attenuator configuration. Misconceptions about the “dangers” of the inverting attenuator persist. Relax. Simulate stability in TINA-TI or your favorite SPICE program to confirm it. And if you have doubts or problems, check with the experts on our E2E forum.

And speaking of experts, I’d like to welcome Tim Green, guru of amplifier stability issues, back to TI. Tim’s article series and presentations on amplifier stability analysis are renowned and it’s great to have him back on our E2E forums. You’ll “see” him there.

Your comments are always welcome.

Bruce email: thesignal@list.ti.com (Email for direct communications.)

Check out other interesting topics… Table of Contents for all The Signal blogs.

Comparators—what’s all the chatter?

2013-01-28T23:34:00Z

It’s an easy concept—the inputs compare two voltages. The output is high or low. So, why all the chatter through the transition?

This effect usually occurs with slow changes through the transition voltage. Often it’s because the input signals have noise that jiggles through the transition voltage causing a chattering output. Even with very clean input voltages, comparators have their own noise—like an op amp. They also sometimes make noise when the output slams from one rail to another, reverberating through the supply or output circuitry back to the input. Chatter!

Whatever the cause, hysteresis is often the solution—controlled positive feedback. It’s like the snap action of a toggle switch. As you gradually push the lever, over-center spring action snaps to the new position. Without spring action a toggle switch might chatter midway, its contacts arcing and sparking.

Figure 1a shows a simple comparator with threshold, V_R, set at 2V. A slowly rising and falling input has a tendency to trigger the output multiple times through the transition.

In figure 1b, R1 and R2 form a voltage divider from the output—positive feedback switches the threshold voltage to create hysteresis. When a rising input voltage reaches the threshold, the falling edge of Vo moves the threshold to a lower voltage, overcoming noise that causes chatter.

Magnitude of the hysteresis is determined by the output voltage swing of the comparator, V_OH, in conjunction with the values of the resistor divider. The hysteresis band, ∆V_T, is set according to the input noise level and tendency to chatter.

You can also make a non-inverting comparator circuit with hysteresis by reversing the connections to Vin and V_R, figure 2. The threshold voltages are slightly different. Be sure the input signal is solid. In some circuits, feedback from the output transition can glitch the input signal source, creating ringing and more chatter.

Some comparators have open-drain (or open-collector) outputs. These types may be somewhat less effective in creating hysteresis on the positive-going output edge because output capacitance can slow the rising transition. This delivers less threshold change at the instant that you need it most. Also, be aware that, depending on the values chosen, the hysteresis network will load the output voltage, reducing output voltage swing.

Hysteresis creates different trip thresholds on rising and falling inputs and this can be a disadvantage in some applications. A capacitor in series with R2 can create a temporary change in the threshold—possibly long enough for the input to move through a noisy threshold range. This won’t work if you have a very slowly changing input such as battery voltage. Try this approach if you have reasonably fast moving input ramp rates.

Some comparators (TLV3201, for example) have built-in hysteresis, no external resistors required. This is accomplished with internal circuit nodes and leaves the inputs and output unencumbered for your circuitry. The fixed hysteresis voltage band of these devices is handy and effective for most circuits. You can add more with external resistors, if needed.

Can op amps be used as comparators? Yes, sometimes… read more here.

Thanks for reading. Please share your experience in comments below… got any good anti-chatter tricks?

Bruce email: thesignal@list.ti.com (Email for direct communications.)

Check out other interesting topics… Table of Contents for all The Signal blogs.