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00067 #ifndef BQ_PACK_H
00068 #define BQ_PACK_H
00069
00070 #include "data_flash.h"
00071
00076
00077 #define IN_HOST_CHG_OP BIT0
00078
00080
00081
00082 #define BQ76PL536_OUTPUTS_VECTOR PORT1_VECTOR
00083 #define BQ76PL536_OUTPUTS_PxIV P1IV
00084
00085 #define BQ76PL536_CONV_PxIN P1IN
00086 #define BQ76PL536_CONV_PxOUT P1OUT
00087 #define BQ76PL536_CONV_PxDIR P1DIR
00088 #define BQ76PL536_CONV_PxIFG P1IFG
00089 #define BQ76PL536_CONV_PxIES P1IES
00090 #define BQ76PL536_CONV_PxIE P1IE
00091 #define BQ76PL536_CONV_PxSEL P1SEL
00092 #define BQ76PL536_CONV_PxREN P1REN
00093 #define OUT_BQ_CONV BIT4 //Port X.4
00094
00095 #define BQ76PL536_LED_PxIN P1IN
00096 #define BQ76PL536_LED_PxOUT P1OUT
00097 #define BQ76PL536_LED_PxDIR P1DIR
00098 #define BQ76PL536_LED_PxIFG P1IFG
00099 #define BQ76PL536_LED_PxIES P1IES
00100 #define BQ76PL536_LED_PxIE P1IE
00101 #define BQ76PL536_LED_PxSEL P1SEL
00102 #define BQ76PL536_LED_PxREN P1REN
00103 #define OUT_BQ_LED BIT0
00104
00105 #define BQ76PL536_DRDY_PxIV P1IV
00106 #define BQ76PL536_DRDY_PxIN P1IN
00107 #define BQ76PL536_DRDY_PxOUT P1OUT
00108 #define BQ76PL536_DRDY_PxDIR P1DIR
00109 #define BQ76PL536_DRDY_PxIFG P1IFG
00110 #define BQ76PL536_DRDY_PxIES P1IES
00111 #define BQ76PL536_DRDY_PxIE P1IE
00112 #define BQ76PL536_DRDY_PxSEL P1SEL
00113 #define BQ76PL536_DRDY_PxREN P1REN
00114
00115 #define BQ76PL536_ALERT_PxIN P1IN
00116 #define BQ76PL536_ALERT_PxOUT P1OUT
00117 #define BQ76PL536_ALERT_PxDIR P1DIR
00118 #define BQ76PL536_ALERT_PxIFG P1IFG
00119 #define BQ76PL536_ALERT_PxIES P1IES
00120 #define BQ76PL536_ALERT_PxIE P1IE
00121 #define BQ76PL536_ALERT_PxSEL P1SEL
00122 #define BQ76PL536_ALERT_PxREN P1REN
00123
00124 #define BQ76PL536_FAULT_PxIN P1IN
00125 #define BQ76PL536_FAULT_PxOUT P1OUT
00126 #define BQ76PL536_FAULT_PxDIR P1DIR
00127 #define BQ76PL536_FAULT_PxIFG P1IFG
00128 #define BQ76PL536_FAULT_PxIES P1IES
00129 #define BQ76PL536_FAULT_PxIE P1IE
00130 #define BQ76PL536_FAULT_PxSEL P1SEL
00131 #define BQ76PL536_FAULT_PxREN P1REN
00132 #define IN_BQ_DRDY BIT3 //PORTx.3
00133 #define IN_BQ_ALERT BIT2 //PORTx.2
00134 #define IN_BQ_FAULT BIT1 //PORTx.1
00135
00136
00137 #define ADC_CONTROL_VAL_6 ((1<<6)|(3<<4)|(0<<3)|(5<<0))
00138 #define ADC_CONTROL_VAL_5 ((1<<6)|(3<<4)|(0<<3)|(4<<0))
00139 #define ADC_CONTROL_VAL_4 ((1<<6)|(3<<4)|(0<<3)|(3<<0))
00140
00141
00142 #define IO_CONTROL_VAL ((0<<7)|(0<<6)|(0<<5)|(0<<2)|(0<<1)|(0<<0))
00143
00144
00145 #define CB_CTRL_VAL 0
00146 #define CB_TIME_VAL 0
00147
00148
00149 #define ADC_CONVERT_VAL (1<<0)
00150
00151
00152 #define SHDW_CTRL_ACCESS_EN_VAL 0x35
00153
00154 #define SHDW_CTRL_REFRESH_EN_VAL 0x27
00155
00156 #define E_EN_OTP_EN_VAL 0x91
00157
00158
00159 #define FUNC_CONFIG_VAL_6 ((0x1<<6)|(0<<5)|(0<<4)|(0x0<<2)|(0<<0))
00160 #define FUNC_CONFIG_VAL_5 ((0x1<<6)|(0<<5)|(0<<4)|(0x1<<2)|(0<<0))
00161 #define FUNC_CONFIG_VAL_4 ((0x1<<6)|(0<<5)|(0<<4)|(0x2<<2)|(0<<0))
00162
00163
00164 #define IO_CONFIG_VAL (0<<0)
00165
00166 #define DISCARD_CRC (1)
00167 #define RETURN_CRC (0)
00168
00169
00170
00171 #define CONFIG_COV_VAL (0<<7)
00172
00173 #define CONFIG_COVT_VAL (1<<7)
00174
00175
00176
00177 #define CONFIG_CUV_VAL (0<<7)
00178
00179 #define CONFIG_CUVT_VAL (1<<7)
00180
00181
00182
00183 #define CONFIG_OT_VAL (3<<4)
00184 #define CONFIG_OTT_VAL (200<<0)
00185
00186
00187 #define adc_step_mul 6250
00188 #define adc_step_div 16383
00189
00190
00191 #define BROADCAST_ADDR 0x3F
00192 #define DISCOVERY_ADDR 0x00
00193 #define BQ76PL536_RESET 0xa5
00194
00195
00196 typedef enum BQ_DEV_REGS
00197 {
00198 DEVICE_STATUS_REG=0x00,
00199 GPAI_L_REG=0x01,
00200 GPAI_H_REG=0x02,
00201 VCELL1_L_REG=0x03,
00202 VCELL1_H_REG=0x04,
00203 VCELL2_L_REG=0x05,
00204 VCELL2_H_REG=0x06,
00205 VCELL3_L_REG=0x07,
00206 VCELL3_H_REG=0x08,
00207 VCELL4_L_REG=0x09,
00208 VCELL4_H_REG=0x0a,
00209 VCELL5_L_REG=0x0b,
00210 VCELL5_H_REG=0x0c,
00211 VCELL6_L_REG=0x0d,
00212 VCELL6_H_REG=0x0e,
00213 TEMPERATURE1_L_REG=0x0f,
00214 TEMPERATURE1_H_REG=0x10,
00215 TEMPERATURE2_L_REG=0x11,
00216 TEMPERATURE2_H_REG=0x12,
00217 ALERT_STATUS_REG=0x20,
00218 FAULT_STATUS_REG=0x21,
00219 COV_FAULT_REG=0x22,
00220 CUV_FAULT_REG=0x23,
00221 PRESULT_A_REG=0x24,
00222 PRESULT_B_REG=0x25,
00223 ADC_CONTROL_REG=0x30,
00224 IO_CONTROL_REG=0x31,
00225 CB_CTRL_REG=0x32,
00226 CB_TIME_REG=0x33,
00227 ADC_CONVERT_REG=0x34,
00228 SHDW_CTRL_REG=0x3a,
00229 ADDRESS_CONTROL_REG=0x3b,
00230 RESET_REG=0x3c,
00231 TEST_SELECT_REG=0x3d,
00232 E_EN_REG=0x3F,
00233 FUNCTION_CONFIG_REG=0x40,
00234 IO_CONFIG_REG=0x41,
00235 CONFIG_COV_REG=0x42,
00236 CONFIG_COVT_REG=0x43,
00237 CONFIG_CUV_REG=0x44,
00238 CONFIG_CUVT_REG=0x45,
00239 CONFIG_OT_REG=0x46,
00240 CONFIG_OTT_REG=0x47,
00241 USER1_REG=0x48,
00242 USER2_REG=0x49,
00243 USER3_REG=0x4A,
00244 USER4_REG=0x4B,
00245 BQ_SPI_REG_MAX=0x4F
00246 } bq_dev_regs_t;
00247
00248
00249 typedef struct CELL_DATA
00250 {
00251 unsigned short voltage;
00252 } cell_data_t;
00253
00254
00255 typedef struct BQ_DEV
00256 {
00257 unsigned short cell_count;
00258 unsigned char device_address;
00259
00260 unsigned char device_status;
00261
00262 unsigned short cell_voltage[MAX_CELLS_NUMBER_IN_BQ];
00263
00264 unsigned short temperature1;
00265 unsigned short temperature2;
00266
00267 unsigned char alert_status;
00268 unsigned char fault_status;
00269 unsigned char cov_fault;
00270 unsigned char cuv_fault;
00271 } bq_dev_t;
00272
00273
00274 #define FAULT_COV_POS 0
00275 #define FAULT_CUV_POS 1
00276 #define ALERT_OT1_POS 0
00277 #define ALERT_OT2_POS 1
00278
00279
00280 typedef enum OP_MODES
00281 {
00282 INITIAL_MODE = 0,
00283 CHARGE_OP,
00284 END_OF_CHARGE,
00285 DISCHARGE_OP,
00286 END_OF_DISCHARGE,
00287 FAULT_MODE,
00288 SOV_MODE
00289 } op_modes_t;
00290
00291
00292
00293 #define STATUS_ERROR_POT_COV BIT1
00294 #define STATUS_ERROR_CUV BIT2
00295 #define STATUS_ERROR_IMBALANCE_FAIL BIT3
00296 #define STATUS_ERROR_MAX_BALANCE_TIME BIT4
00297
00298 typedef struct BQ_PACK
00299 {
00300 bq_dev_t bq_devs[NUMBER_OF_BQ_DEVICES];
00301 op_modes_t op_mode;
00302 unsigned short error_status;
00303 unsigned short voltage;
00304 unsigned short lowest_cell_volts;
00305 unsigned short highest_cell_volts;
00306 unsigned short last_imbalanced_cell_idx;
00307 unsigned short timer_status;
00308 unsigned short eoc_eod_timer;
00309 unsigned short charge_taper_timer;
00310 unsigned short chg_dschg_op_timer;
00311 unsigned short balancing_timer;
00312 unsigned short max_balance_timer;
00313 unsigned short cell_imbalance_fail_timer;
00314 } bq_pack_t;
00315
00316
00317 #define START_END_OF_CHG_DSCHG_TIMER BIT0
00318 #define START_CHARGE_TAPER_TIMER BIT1
00319 #define START_CELL_BALANCE_TIMER BIT2
00320 #define START_CHG_DSCHG_OP_TIMER BIT3
00321
00322 #define bq_dev_write_reg(a,b,c) spi_write_reg(a,(unsigned char)b,c)
00323 #define bq_dev_read_reg(a,b,c,d,e) spi_read_reg(a,(unsigned char)b,c,d,e)
00324
00325
00326
00327
00328
00329 extern bq_pack_t bq_pack;
00330 extern unsigned char HOST_CONTROL_IN;
00331
00332
00333
00334
00335
00336 extern short bq_pack_address_discovery(void);
00337 extern short bq_pack_init(void);
00338 extern void update_bq_pack_data(void);
00339 extern void BatteryPackManager(void);
00340 extern void bq_pack_start_conv(void);
00341 extern unsigned short get_bq_pack_voltage(void);
00342 extern unsigned short get_bq_pack_timer(void);
00343 extern void update_bq_pack_timer(void);
00344 extern op_modes_t get_bq_pack_mode(void);
00345 extern void set_bq_pack_mode(op_modes_t mode);
00346 extern void CheckFaultConditions(void);
00347 extern unsigned short find_imbalanced_cell(unsigned short bq_pack_id);
00348
00349
00350
00351
00352
00353 void conf_bq_dev(bq_dev_t* this);
00354 void init_bq_dev_data_structure(bq_dev_t* this);
00355 short bq_dev_read_cell_voltage(bq_dev_t* this);
00356 short bq_dev_read_temps(bq_dev_t* this);
00357 short bq_dev_read_errors(bq_dev_t* this);
00358 short bq_dev_read_status(bq_dev_t* this);
00359 void bq_dev_clear_alerts(bq_dev_t* this);
00360 void bq_dev_clear_faults(bq_dev_t* this);
00361 void update_state_machine(op_modes_t new_mode);
00362 short check_for_cov(void);
00363 short check_for_cuv(void);
00364 short check_for_pot(void);
00365 void update_op_mode(op_modes_t new_mode);
00366 void copy_cell_voltage_values(void);
00367 unsigned short check_for_discharge_op(void);
00368 unsigned short check_for_charge_op(void);
00369 void CellBalancing(void);
00370 void CheckChargeDischargeModes(void);
00371 void CheckEndOfChargeOrDischargeModes(void);
00372 void enable_bypass_resistor(unsigned short in_dev_id, unsigned short in_value);
00373 void disable_bypass_resistor(unsigned short in_dev_id, unsigned short in_value);
00374 void disable_all_bypass_resistors(void);
00375 unsigned short cell_imbalance_threshold_reached(void);
00376
00377
00378
00379 #endif
00380
00381