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00082 #ifndef _defMSP430USB_H
00083 #define _defMSP430USB_H
00084
00085
00086
00087
00088 #define YES 1
00089 #define NO 0
00090
00091 #define TRUE 1
00092 #define FALSE 0
00093
00094 #define NOERR 0
00095 #define ERR 1
00096
00097 #define NO_ERROR 0
00098 #define ERROR 1
00099
00100 #define DISABLE 0
00101 #define ENABLE 1
00102
00103
00104
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00107
00108
00109 #define MAX_ENDPOINT_NUMBER 0x07 // A maximum of 7 endpoints is available
00110 #define EP0_MAX_PACKET_SIZE 0x08
00111 #define EP0_PACKET_SIZE 0x08
00112 #define EP_MAX_PACKET_SIZE 0x40
00113
00114
00115 #define OEP1_X_BUFFER_ADDRESS 0x1C00 // Input Endpoint 1 X Buffer Base-address
00116 #define OEP1_Y_BUFFER_ADDRESS 0x1C40 // Input Endpoint 1 Y Buffer Base-address
00117 #define IEP1_X_BUFFER_ADDRESS 0x1C80 // Output Endpoint 1 X Buffer Base-address
00118 #define IEP1_Y_BUFFER_ADDRESS 0x1CC0 // Output Endpoint 1 Y Buffer Base-address
00119
00120 #define OEP2_X_BUFFER_ADDRESS 0x1D00 // Input Endpoint 2 X Buffer Base-address
00121 #define OEP2_Y_BUFFER_ADDRESS 0x1D40 // Input Endpoint 2 Y Buffer Base-address
00122 #define IEP2_X_BUFFER_ADDRESS 0x1D80 // Output Endpoint 2 X Buffer Base-address
00123 #define IEP2_Y_BUFFER_ADDRESS 0x1DC0 // Output Endpoint 2 Y Buffer Base-address
00124
00125 #define OEP3_X_BUFFER_ADDRESS 0x1E00 // Input Endpoint 2 X Buffer Base-address
00126 #define OEP3_Y_BUFFER_ADDRESS 0x1E40 // Input Endpoint 2 Y Buffer Base-address
00127 #define IEP3_X_BUFFER_ADDRESS 0x1E80 // Output Endpoint 2 X Buffer Base-address
00128 #define IEP3_Y_BUFFER_ADDRESS 0x1EC0 // Output Endpoint 2 Y Buffer Base-address
00129
00130 #define OEP4_X_BUFFER_ADDRESS 0x1F00 // Input Endpoint 2 X Buffer Base-address
00131 #define OEP4_Y_BUFFER_ADDRESS 0x1F40 // Input Endpoint 2 Y Buffer Base-address
00132 #define IEP4_X_BUFFER_ADDRESS 0x1F80 // Output Endpoint 2 X Buffer Base-address
00133 #define IEP4_Y_BUFFER_ADDRESS 0x1FC0 // Output Endpoint 2 Y Buffer Base-address
00134
00135 #define OEP5_X_BUFFER_ADDRESS 0x2000 // Input Endpoint 2 X Buffer Base-address
00136 #define OEP5_Y_BUFFER_ADDRESS 0x2040 // Input Endpoint 2 Y Buffer Base-address
00137 #define IEP5_X_BUFFER_ADDRESS 0x2080 // Output Endpoint 2 X Buffer Base-address
00138 #define IEP5_Y_BUFFER_ADDRESS 0x20C0 // Output Endpoint 2 Y Buffer Base-address
00139
00140 #define OEP6_X_BUFFER_ADDRESS 0x2100 // Input Endpoint 2 X Buffer Base-address
00141 #define OEP6_Y_BUFFER_ADDRESS 0x2140 // Input Endpoint 2 Y Buffer Base-address
00142 #define IEP6_X_BUFFER_ADDRESS 0x2180 // Output Endpoint 2 X Buffer Base-address
00143 #define IEP6_Y_BUFFER_ADDRESS 0x21C0 // Output Endpoint 2 Y Buffer Base-address
00144
00145 #define OEP7_X_BUFFER_ADDRESS 0x2200 // Input Endpoint 2 X Buffer Base-address
00146 #define OEP7_Y_BUFFER_ADDRESS 0x2240 // Input Endpoint 2 Y Buffer Base-address
00147 #define IEP7_X_BUFFER_ADDRESS 0x2280 // Output Endpoint 2 X Buffer Base-address
00148 #define IEP7_Y_BUFFER_ADDRESS 0x22C0 // Output Endpoint 2 Y Buffer Base-address
00149
00150 #define X_BUFFER 0
00151 #define Y_BUFFER 1
00152
00153
00154 #define EP1_ADDR 0x01 //address for endpoint 1
00155 #define EP2_ADDR 0x02 //address for endpoint 2
00156 #define EP3_ADDR 0x03 //address for endpoint 3
00157 #define EP4_ADDR 0x04 //address for endpoint 4
00158 #define EP5_ADDR 0x05 //address for endpoint 5
00159 #define EP6_ADDR 0x06 //address for endpoint 6
00160 #define EP7_ADDR 0x07 //address for endpoint 7
00161
00162
00163 typedef struct _tEDB
00164 {
00165 BYTE bEPCNF;
00166 BYTE bEPBBAX;
00167 BYTE bEPBCTX;
00168 BYTE bSPARE0;
00169 BYTE bSPARE1;
00170 BYTE bEPBBAY;
00171 BYTE bEPBCTY;
00172 BYTE bEPSIZXY;
00173 } tEDB, *tpEDB;
00174
00175 typedef struct _tEDB0
00176 {
00177 BYTE bIEPCNFG;
00178 BYTE bIEPBCNT;
00179 BYTE bOEPCNFG;
00180 BYTE bOEPBCNT;
00181 } tEDB0, *tpEDB0;
00182
00183
00184 #define EPCNF_USBIE 0x04 // USB Interrupt on Transaction Completion. Set By MCU
00185
00186 #define EPCNF_STALL 0x08 // USB Stall Condition Indication. Set by UBM
00187
00188 #define EPCNF_DBUF 0x10 // Double Buffer Enable. Set by MCU
00189
00190
00191 #define EPCNF_TOGGLE 0x20 // USB Toggle bit. This bit reflects the toggle sequence bit of DATA0 and DATA1.
00192
00193 #define EPCNF_UBME 0x80 // UBM Enable or Disable bit. Set or Clear by MCU.
00194
00195
00196 #define EPBCNT_BYTECNT_MASK 0x7F // MASK for Buffer Byte Count
00197 #define EPBCNT_NAK 0x80 // NAK, 0:No Valid in buffer, 1:Valid packet in buffer
00198
00199
00200 #define START_OF_USB_BUFFER 0x1C00
00201
00202
00203 #define USBIEP0BUF 0x2378
00204 #define USBOEP0BUF 0x2370
00205
00206
00207 #endif