TI_USCI_SPI_Regs.h

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#ifndef TI_USCI_SPI_Regs
#define TI_USCI_SPI_Regs

//SPI module definitions
#define USCI_AB_MODULE   0     //USCI Module 0 will be used

#define IO_SPI_CS   BIT7  //P2.7
#define IO_SPI_SDI  BIT0  //P3.0
#define IO_SPI_SDO  BIT1  //P3.1
#define IO_SPI_SCLK BIT2  //P3.2

//SPI port definitions
#define STE_PxIN    P2IN
#define STE_PxOUT   P2OUT
#define STE_PxDIR   P2DIR
#define STE_PxSEL   P2SEL
#define STE_PxREN   P2REN

#define SIMO_PxIN   P3IN
#define SIMO_PxOUT  P3OUT
#define SIMO_PxDIR  P3DIR
#define SIMO_PxSEL  P3SEL
#define SIMO_PxREN  P3REN

#define SOMI_PxIN   P3IN
#define SOMI_PxOUT  P3OUT
#define SOMI_PxDIR  P3DIR
#define SOMI_PxSEL  P3SEL
#define SOMI_PxREN  P3REN

#define CLK_PxIN    P3IN
#define CLK_PxOUT   P3OUT
#define CLK_PxDIR   P3DIR
#define CLK_PxSEL   P3SEL
#define CLK_PxREN   P3REN

#if (USCI_AB_MODULE == 0)
     #ifdef   __MSP430_HAS_USCI_A0__ 
      #define UCAxCTL0             UCA0CTL0             //* USCI Control Register 0 */  
      #define UCAxCTL1           UCA0CTL1               //* USCI Control Register 1 */
                  #define UCAxBR0        UCA0BR0    //* USCI Baud Rate 0 */
                  #define UCAxBR1        UCA0BR1          //* USCI Baud Rate 1 */
                  #define UCAxMCTL         UCA0MCTL       //* USCI modulation control register*/
                  #define UCAxSTAT       UCA0STAT               //* USCI Status Register */
                  #define UCAxRXBUF      UCA0RXBUF      //* USCI Receive Buffer */
                  #define UCAxTXBUF      UCA0TXBUF      //* USCI Transmit Buffer */
                  #define UCAxICTL                       UCA0ICTL               //Interrupt control register    
                  #define UCAxIE                                 UCA0IE                 //Interrupt Enable Register
                  #define UCAxIFG                                UCA0IFG                //Interrupt Flag register
                  #define UCAxIV                                 UCA0IV                 //interrupt Vector register     
                  #define UCAxRXIE       BIT0
                  #define UCAxTXIE       BIT1
                  #define UCAxRXIFG      BIT0
                  #define UCAxTXIFG      BIT1
     #endif  
     #ifdef   __MSP430_HAS_USCI_B0__ 
                        #define UCBxCTL0                   UCB0CTL0             //* USCI Control Register 0 */  
                        #define UCBxCTL1         UCB0CTL1               //* USCI Control Register 1 */
                        #define UCBxBR0          UCB0BR0                //* USCI Baud Rate 0 */
                        #define UCBxBR1          UCB0BR1                //* USCI Baud Rate 1 */
                        #define UCBxMCTL           UCB0MCTL             //* USCI modulation control register*/
                        #define UCBxSTAT         UCB0STAT               //* USCI Status Register */
                        #define UCBxRXBUF        UCB0RXBUF  //* USCI Receive Buffer */
                        #define UCBxTXBUF        UCB0TXBUF  //* USCI Transmit Buffer */
                        #define UCBxICTL                         UCB0ICTL               //Interrupt control register    
                        #define UCBxIE                           UCB0IE                 //Interrupt Enable Register
                        #define UCBxIFG                          UCB0IFG                //Interrupt Flag register
                        #define UCBxIV                           UCB0IV                 //interrupt Vector register     
                        #define UCBxRXIE       BIT0
                        #define UCBxTXIE       BIT1
                        #define UCBxRXIFG      BIT0
                        #define UCBxTXIFG      BIT1
           #endif
#endif

#if (USCI_AB_MODULE == 1)
    #ifdef   __MSP430_HAS_USCI_A1__
                        #define UCAxCTL0                   UCA1CTL0             //* USCI Control Register 0 */  
                        #define UCAxCTL1         UCA1CTL1               //* USCI Control Register 1 */
                        #define UCAxBR0          UCA1BR0                //* USCI Baud Rate 0 */
                        #define UCAxBR1          UCA1BR1                //* USCI Baud Rate 1 */
                        #define UCAxMCTL           UCA1MCTL             //* USCI modulation control register*/
                        #define UCAxSTAT         UCA1STAT               //* USCI Status Register */
                        #define UCAxRXBUF        UCA1RXBUF      //* USCI Receive Buffer */
                        #define UCAxTXBUF        UCA1TXBUF      //* USCI Transmit Buffer */
                        #define UCAxICTL                         UCA1ICTL               //Interrupt control register    
                        #define UCAxIE                           UCA1IE                 //Interrupt Enable Register
                        #define UCAxIFG                          UCA1IFG                //Interrupt Flag register
                        #define UCAxIV                           UCA1IV                 //interrupt Vector register     
                        #define UCAxRXIE       BIT0
                        #define UCAxTXIE       BIT1
                        #define UCAxRXIFG      BIT0
                        #define UCAxTXIFG      BIT1
                #endif
          #ifdef   __MSP430_HAS_USCI_B1__
                        #define UCBxCTL0                   UCB1CTL0             //* USCI Control Register 0 */  
                        #define UCBxCTL1         UCB1CTL1               //* USCI Control Register 1 */
                        #define UCBxBR0          UCB1BR0                //* USCI Baud Rate 0 */
                        #define UCBxBR1          UCB1BR1                //* USCI Baud Rate 1 */
                        #define UCBxMCTL           UCB1MCTL             //* USCI modulation control register*/
                        #define UCBxSTAT         UCB1STAT               //* USCI Status Register */
                        #define UCBxRXBUF        UCB1RXBUF      //* USCI Receive Buffer */
                        #define UCBxTXBUF        UCB1TXBUF      //* USCI Transmit Buffer */
                        #define UCBxICTL                         UCB1ICTL               //Interrupt control register    
                        #define UCBxIE                           UCB1IE                 //Interrupt Enable Register
                        #define UCBxIFG                          UCB1IFG                //Interrupt Flag register
                        #define UCBxIV                           UCB1IV                 //interrupt Vector register     
                        #define UCBxRXIE       BIT0
                        #define UCBxTXIE       BIT1
                        #define UCBxRXIFG      BIT0
                        #define UCBxTXIFG      BIT1
                #endif
#endif

#endif