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* Copyright (C) 2003-2010 Texas Instruments Incorporated.
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 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the 
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 *    distribution.
 *
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
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 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
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*/
#ifndef _CSLR_QM_QUEUE_STATUS_CONFIG_H_
#define _CSLR_QM_QUEUE_STATUS_CONFIG_H_

/* CSL Modification:
 *  The file has been modified from the AUTOGEN file for the following
 *  reasons:-
 *      a) Modified the header file includes to be RTSC compliant
 */

#include <cslr.h>
#include <tistdtypes.h>

/* Minimum unit = 1 byte */

/**************************************************************************\
* Register Overlay Structure for QUEUE_STATUS_CONFIG_GROUP
\**************************************************************************/
typedef struct  {
    volatile Uint32 QUEUE_STATUS_CONFIG_REG_A;
    volatile Uint32 QUEUE_STATUS_CONFIG_REG_B;
    volatile Uint32 QUEUE_STATUS_CONFIG_REG_C;
    volatile Uint32 QUEUE_STATUS_CONFIG_REG_D;
} CSL_Qm_queue_status_configQueue_status_config_groupRegs;

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    CSL_Qm_queue_status_configQueue_status_config_groupRegs QUEUE_STATUS_CONFIG_GROUP[8192];
} CSL_Qm_queue_status_configRegs;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* QUEUE_STATUS_CONFIG_REG_A */

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_A_QUEUE_ENTRY_COUNT_MASK (0x0007FFFFu)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_A_QUEUE_ENTRY_COUNT_SHIFT (0x00000000u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_A_QUEUE_ENTRY_COUNT_RESETVAL (0x00000000u)

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_A_RESETVAL (0x00000000u)

/* QUEUE_STATUS_CONFIG_REG_B */

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_B_QUEUE_BYTE_COUNT_MASK (0xFFFFFFFFu)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_B_QUEUE_BYTE_COUNT_SHIFT (0x00000000u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_B_QUEUE_BYTE_COUNT_RESETVAL (0x00000000u)

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_B_RESETVAL (0x00000000u)

/* QUEUE_STATUS_CONFIG_REG_C */

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_C_PACKET_SIZE_MASK (0x0001FFFFu)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_C_PACKET_SIZE_SHIFT (0x00000000u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_C_PACKET_SIZE_RESETVAL (0x00000000u)

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_C_RESETVAL (0x00000000u)

/* QUEUE_STATUS_CONFIG_REG_D */

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_MASK (0x0000000Fu)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_SHIFT (0x00000000u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_RESETVAL (0x00000000u)

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_HILO_MASK (0x00000080u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_HILO_SHIFT (0x00000007u)
#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_THRESHOLD_HILO_RESETVAL (0x00000000u)

#define CSL_QM_QUEUE_STATUS_CONFIG_QUEUE_STATUS_CONFIG_REG_D_RESETVAL (0x00000000u)

#endif
