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| _CSL_RAC_BEII_interruptStatus | CSL_RAC_BEII_interruptStatus This descriptor specifies the parameters obtained from the interrupt status register |
| _CSL_RAC_FE_Timestamp_req | CSL_RAC_FE_Timestamp_req This descriptor specifies the parameters required to setup a timestamp |
| _CSL_RAC_GCCP_cycleOverflowStatus | CSL_RAC_GCCP_cycleOverflowStatus This descriptor specifies the parameters required obtained when reading the cycle overflow status register |
| _CSL_RAC_GCCP_fifoOverflowStatus | CSL_RAC_GCCP_fifoOverflowStatus This descriptor specifies the parameters required obtained when reading the fifo overflow status register |
| CSL_Aif2AdCommonSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the common parameters of aif2 Dma module |
| CSL_Aif2AdDioEngine | This is a sub-structure in CSL_Aif2AdDioSetup. This structure is used for configuring the parameters of aif2 dma engine |
| CSL_Aif2AdDioSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of aif2 dma module especially for DIO mode |
| CSL_Aif2AtCaptRadt | This object contains the aif2 radt capture value information |
| CSL_Aif2AtCommonSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the common parameters of aif2 timer module |
| CSL_Aif2AtCountObj | |
| CSL_Aif2AtEvent | This is a sub-structure in CSL_Aif2AtEventSetup. This structure is used for configuring the parameters of aif2 at event for external Rad events and Internal events for dio |
| CSL_Aif2AtEventSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of aif2 dma module especially for external Rad events and Internal events for dio |
| CSL_Aif2AtGsmTCount | This object contains the aif2 GSM Tcount information |
| CSL_Aif2AtInitObj | |
| CSL_Aif2AtLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of aif2 timer module |
| CSL_Aif2AtTcObj | |
| CSL_Aif2AtWcdmaCount | This object contains the aif2 wcdma count value information |
| CSL_Aif2BaseAddress | This will have the base-address information for the peripheral instance |
| CSL_Aif2CommonLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of common link index specifies which all link modules are using |
| CSL_Aif2CommonSetup | This is a sub-structure in CSL_Aif2HwSetup. This structure is used for configuring the parameters of a link |
| CSL_Aif2CpriCwLut | This structure is used for dynamic configuring the cpri 256 control word LUT parameters of protocol decoder |
| CSL_Aif2CpriTmSetup | This is a sub-structure in CSL_Aif2TmLinkSetup. This structure is used for configuring the parameters of the CPRI params relating to TM |
| CSL_Aif2DbChannel | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of ingress Data Buffer |
| CSL_Aif2DbSideData | This object contains the aif2 DB side data information |
| CSL_Aif2DualBitMap | This is a sub-structure in CSL_Aif2Pd(Pe)LinkSetup. This structure is used for configuring the parameters of Pd and Pe dual bit map |
| CSL_Aif2EeAdInt | This object contains the aif2 EE AD Interrupt data information |
| CSL_Aif2EeAif2Int | This object contains the aif2 EE Aif2 Error Interrupt data information |
| CSL_Aif2EeAif2Run | This object contains the EE aif2 run control data information |
| CSL_Aif2EeAtInt | This object contains the aif2 EE AT Interrupt data information |
| CSL_Aif2EeCdInt | This object contains the aif2 EE CD(PKTDMA module) Interrupt data information |
| CSL_Aif2EeDbInt | This object contains the aif2 EE DB Interrupt data information |
| CSL_Aif2EeLinkAInt | This object contains the aif2 EE Link A Interrupt data information |
| CSL_Aif2EeLinkBInt | This object contains the aif2 EE Link B Interrupt data information |
| CSL_Aif2EeOrigin | This object contains the aif2 EE error and alarm origination information |
| CSL_Aif2EePdInt | This object contains the aif2 EE PD Interrupt data information |
| CSL_Aif2EePeInt | This object contains the aif2 EE PE Interrupt data information |
| CSL_Aif2EeSdInt | This object contains the aif2 EE SD Interrupt data information |
| CSL_Aif2EeVcInt | This object contains the aif2 EE VC Interrupt data information |
| CSL_Aif2EgrDbSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of Egress data buffer |
| CSL_Aif2FrameCounter | This is a sub-structure in CSL_Aif2Pd(Pe)CommonSetup. This structure is used for configuring the parameters of PD, PE frame counter |
| CSL_Aif2GlobalSetup | This is a sub-structure in CSL_Aif2HwSetup. This structure is used for configuring the parameters global to AIF2 |
| CSL_Aif2IngrDbSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of ingress Data Buffer |
| CSL_Aif2LinkSetup | This is a sub-structure in CSL_Aif2HwSetup. This structure is used for configuring the parameters of an outbound link |
| CSL_Aif2ModuloTc | This is a sub-structure in CSL_Aif2Pd(Pe)CommonSetup. This structure is used for configuring the parameters of Modulo Terminal count |
| CSL_Aif2Obj | This object contains the reference to the instance of AIF2 opened using the CSL_aif2Open() |
| CSL_Aif2Param | Module specific parameters |
| CSL_Aif2PdChannelConfig | This structure is used for dynamic configuring the channel parameters of protocol decoder |
| CSL_Aif2PdChConfig | This is a sub-structure in CSL_Aif2PdCommonSetup. This structure is used for configuring Pd 128 Dma channel configuration |
| CSL_Aif2PdChConfig1 | This is a sub-structure in CSL_Aif2PdCommonSetup. This structure is used for configuring Pd 128 Dma channel configuration 1 register |
| CSL_Aif2PdCommonSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of protocol decoder which are common to all links |
| CSL_Aif2PdCpriIdLut | This structure is used for dynamic configuring the cpri Id LUT parameters of protocol decoder |
| CSL_Aif2PdLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of protocol decoder |
| CSL_Aif2PdRoute | This is a sub-structure in CSL_Aif2PdCommonSetup. This structure is used for configuring the routing parameters of protocol decoder |
| CSL_Aif2PdTypeLut | This is a sub-structure in CSL_Aif2PdLinkSetup. This structure is used for configuring the parameters of 32 Pd type LUT |
| CSL_Aif2PeChannelConfig | This structure is used for dynamic configuring the channel parameters of protocol encoder |
| CSL_Aif2PeChRuleLut | This structure is used for dynamic configuring the channel parameters of protocol encoder |
| CSL_Aif2PeCommonSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of protocol encoder which are common to all links |
| CSL_Aif2PeDbmr | This structure is used for DBMR dynamic configuring parameters of protocol encoder |
| CSL_Aif2PeDmaCh0 | This is a sub-structure in CSL_Aif2PeCommonSetup. This structure is used for PE DMA channel configuration 0 register |
| CSL_Aif2PeInFifoControl | This is a sub-structure in CSL_Aif2PeCommonSetup. This structure is used for PE input fifo control register |
| CSL_Aif2PeLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the link parameters of protocol encoder |
| CSL_Aif2PeModuloRule | This structure is used for dynamic configuring the Modulo rule parameters of protocol encoder |
| CSL_Aif2PeObsaiHeader | This structure is used for dynamic configuring the obsai header parameters of protocol encoder |
| CSL_Aif2PidStatus | This object contains the aif2 PID information |
| CSL_Aif2RmLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of RM link |
| CSL_Aif2RmStatus0 | This object contains the aif2 Rm link status0 information |
| CSL_Aif2RmStatus1 | This object contains the aif2 Rm link status1 information |
| CSL_Aif2RmStatus2 | This object contains the aif2 Rm link status2 information |
| CSL_Aif2RmStatus3 | This object contains the aif2 Rm link status3 information |
| CSL_Aif2RmStatus4 | This object contains the aif2 Rm link status4 information |
| CSL_Aif2RtHeaderStatus | This object contains the aif2 Rt header error status information |
| CSL_Aif2RtLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of Retransmitter |
| CSL_Aif2RtStatus | This object contains the aif2 Rt link status information |
| CSL_Aif2SdCommonSetup | This is a sub-structure in CSL_Aif2CommonSetup. This structure is used for configuring the parameters of a SD module, the link index specifies which SD module is used links 0-3 use SD module 0, links 4-5 use SD module 1 |
| CSL_Aif2SdLinkSetup | This is a sub-structure in CSL_AifCommonLinkSetup. This structure is used for configuring the parameters for Serdes params specific to a link |
| CSL_Aif2SdRxStatus | This object contains the aif2 SERDES Rx link status information |
| CSL_Aif2SdTxStatus | This object contains the aif2 SERDES Tx link status information |
| CSL_Aif2Setup | This is the Setup structure for configuring AIF2 using CSL_aif2HwSetup() function |
| CSL_Aif2TmLinkSetup | This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of the TM |
| CSL_Aif2TmStatus | This object contains the aif2 Tm link status information |
| CSL_Aif2VcEmu | This object contains the aif2 Vc Emu control data information |
| CSL_BWMNGMT_CPUARB_SETUP | CSL_BWMNGMT_CPUARB_SETUP has all the fields required to configure the CPU Arbitration Control Register of BWMNGMT for any given memory control block (L1D/L2/EMC) |
| CSL_BWMNGMT_MDMAPRI_SETUP | CSL_BWMNGMT_MDMAPRI_SETUP has all the fields required to configure Master DMA (MDMA) Arbitration Control Register of BWMNGMT for L2/UMC memory control block |
| CSL_CPGMAC_SL_MACSTATUS | Holds MAC status register contents |
| CSL_CPGMAC_SL_VERSION | Holds the Sliver submodule's version info |
| CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY | Holds the ALE Multicast Address Table entry configuration |
| CSL_CPSW_3GF_ALE_OUIADDR_ENTRY | Holds the ALE OUI Unicast Address Table entry configuration |
| CSL_CPSW_3GF_ALE_PORTCONTROL | Holds the ALE Port control register info |
| CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY | Holds the ALE Unicast Address Table entry configuration |
| CSL_CPSW_3GF_ALE_VERSION | Holds the ALE submodule's version info |
| CSL_CPSW_3GF_ALE_VLAN_ENTRY | Holds the ALE VLAN Table entry configuration |
| CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY | Holds the ALE VLAN/Multicast Address Table entry configuration |
| CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY | Holds the ALE VLAN Unicast Address Table entry configuration |
| CSL_CPSW_3GF_CONTROL | Holds CPSW control register contents |
| CSL_CPSW_3GF_FLOWCNTL | Holds flow control register contents |
| CSL_CPSW_3GF_PORTSTAT | Holds Port Statistics Enable register contents |
| CSL_CPSW_3GF_PTYPE | Holds Priority type register contents |
| CSL_CPSW_3GF_STATS | Holds the EMAC statistics |
| CSL_CPSW_3GF_TSCNTL | Holds Port Time Sync Control register contents |
| CSL_CPSW_3GF_VERSION | Holds the Time sync submodule's version info |
| CSL_CPSW_3GFSS_VERSION | Holds the Ethernet switch subsystem's version info |
| CSL_CPTS_EVENTINFO | Holds Time sync event info contents |
| CSL_CPTS_VERSION | Holds the Time sync submodule's version info |
| CSL_Edma3ActivityStat | Edma Channel Controller Activity Status |
| CSL_Edma3CfgInfo | EDMA3 Configuration Information This describes the configuration information for each EDMA instance. This is populated by the SOC layer for each instance |
| CSL_Edma3ChannelAttr | Edma Channel parameter structure used for opening a channel |
| CSL_Edma3ChannelErr | Edma Channel Error |
| CSL_Edma3ChannelObj | Edma Object Structure |
| CSL_Edma3CmdDrae | Edma Command Structure for setting region specific attributes |
| CSL_Edma3CmdIntr | Edma Control/Query Control Command structure for issuing commands for Interrupt related APIs An object of this type is allocated by the user and its address is passed to the Control API |
| CSL_Edma3CmdQrae | Edma Control/Query Command Structure for querying qdma region access enable attributes |
| CSL_Edma3CmdQuePri | Edma Command Structure used for setting Event Que priority level |
| CSL_Edma3CmdQueThr | Edma Command Structure used for setting Event Que threshold level |
| CSL_Edma3CmdRegion | Edma Control/Query Command Structure for querying region specific attributes |
| CSL_Edma3CtrlErrStat | Edma Controller Error Status |
| CSL_Edma3HwDmaChannelSetup | QDMA Edma Channel Setup |
| CSL_Edma3HwQdmaChannelSetup | QDMA Edma Channel Setup |
| CSL_Edma3HwSetup | Edma Hw Setup Structure |
| CSL_Edma3MemFaultStat | Edma Memory Protection Fault Error Status |
| CSL_Edma3ModuleBaseAddress | This will have the base-address information for the module instance |
| CSL_Edma3Obj | This object contains the reference to the instance of Edma Module opened using the CSL_edma3Open() |
| CSL_Edma3ParamSetup | Edma ParamSetup Structure |
| CSL_Edma3QueryInfo | Edma Controller Information |
| CSL_Edma3QueStat | Edma Controller Que Status |
| CSL_IDMA_IDMA0CONFIG | This structure holds the information required to initiate a iDMA Channel 0 Configuration(CFG) space Transfer request from the GEM |
| CSL_IDMA_IDMA1CONFIG | This structure holds the information required to initiate a iDMA Channel 1 Block Fill/Transfer request in the GEM |
| CSL_IDMA_STATUS | This structure holds the information required to interpret the IDMA Channel 0/1 Transfer Status |
| CSL_IntcContext | |
| CSL_IntcDropStatus | |
| CSL_IntcEventHandlerRecord | |
| CSL_IntcObj | |
| CSL_MDIO_USERACCESS | Holds the MDIO User Access Register contents |
| CSL_MDIO_USERPHYSEL | Holds the MDIO User Phy Select Register contents |
| CSL_MDIO_VERSION | Holds the MDIO peripheral's version info |
| CSL_MEMPROT_MPFSR | This will be used to query the memory fault status |
| CSL_MEMPROT_MPLKSTAT | This will be used to lock/unlock/reset a memory region |
| CSL_MEMPROT_MPPA | This will be used to set/query the memory page attributes |
| CSL_RAC_BaseAddress | |
| CSL_RAC_Obj | |
| CSL_SGMII_ADVABILITY | SGMII advertised ability configuration info |
| CSL_SGMII_STATUS | Holds the SGMII status info |
| CSL_SGMII_VERSION | Holds the SGMII module version info |
| CSL_TAC_BE_Timestamp_req | This descriptor specifies the parameters required to setup a timestamp |
| CSL_TAC_BEII_interruptStatus | This descriptor specifies the parameters obtained from the interrupt status register |
| CSL_TAC_BETI_status | The descriptor specifies the parameters obtained from the BETI status register |
| CSL_TAC_FE_PeripheralId_req | This descriptor specifies the fields of the peripheral Id register |
| CSL_TAC_FE_transErrorInterruptStatus | This descriptor specifies the fields of the Transaction Error Interrupt Status register |
| CSL_TAC_FE_wdStatus | This descriptor specifies the fields of Watchdog register |
| CSL_TAC_SGCP_cycleOverflowStatus | This descriptor specifies the parameters obtained when reading the cycle overflow status register |
| CSL_TAC_SGCP_fifoOverflowStatus | This descriptor specifies the parameters obtained when reading the FIFO overflow status register |
| CSL_TAC_SGCP_symbolBuffMissStatus | This descriptor specifies the parameters obtained when reading the symbol buffer miss status register |
| CSL_TAC_SGCP_Timestamp_req | This descriptor specifies the parameters that comprise the time stamp |
| CSL_TmrBaseAddress | This structure contains the base-address information for the peripheral instance |
| CSL_TmrConfig | Config-structure Used to configure the GP timer using CSL_tmrHwSetupRaw() |
| CSL_TmrContext | Module specific context information. Present implementation of GP timer CSL doesn't have any context information |
| CSL_TmrHwSetup | Hardware setup structure |
| CSL_TmrObj | Watchdog timer object structure |
| CSL_TmrParam | Module specific parameters. Present implementation of GP timer CSL doesn't have any module specific parameters |
| CSL_XMC_MPFSR | This is the definition of CSL_XMC_MPFSR |
| CSL_XMC_XMPAXH | This is the definition of CSL_XMC_XMPAXH |
| CSL_XMC_XMPAXL | This is the definition of CSL_XMC_XMPAXL |
| CSL_XMC_XPFADDR | This is the definition of CSL_XMC_XPFADDR |
| EMIF4_ECC_CONTROL | ECC Control |
| EMIF4_MSTID_COS_MAPPING | Master ID to COS Mapping |
| EMIF4_PRI_COS_MAPPING | Priority to COS Mapping |
| EMIF4F_IODFT_CONTROL | IODFT Control Values |
| EMIF4F_LPDDR2NVM_TIMING_CONFIG | LPDDR2-NVM Timing Configuration |
| EMIF4F_OUTPUT_IMP_CONFIG | SDRAM Output Impedance Calibration Configuation |
| EMIF4F_PERF_CONFIG | Performance Counter Configuration |
| EMIF4F_PWR_MGMT_CONFIG | Power Management Configuration |
| EMIF4F_SDRAM_CONFIG | EMIF4F SDRAM Configuration |
| EMIF4F_TEMP_ALERT_CONFIG | Temperature Alert Configuration |
| EMIF4F_TIMING1_CONFIG | EMIF4F Timing1 Configuration |
| EMIF4F_TIMING2_CONFIG | EMIF4F Timing2 Configuration |
| EMIF4F_TIMING3_CONFIG | EMIF4F Timing3 Configuration |
| EMIF4F_VBUS_CONFIG_VALUE | VBUS Configuration Values |
| SRIO_AMU_PANE | SRIO AMU Pane |
| SRIO_AMU_WINDOW | SRIO AMU Window |
| SRIO_ERR_RATE | SRIO Error Rate |
| SRIO_LANE_STATUS | SRIO Lane Status |
| SRIO_LSU_TRANSFER | SRIO LSU Transfer |
| SRIO_MESSAGE | SRIO Message Description |
| SRIO_OP_CAR | SRIO Operation Capability Register |
| SRIO_PE_FEATURES | SRIO Processing Element Features |
| SRIO_PLM_CONTROL_SYMBOL | SRIO PLM Control Symbol Configuration |
| SRIO_PLM_IMPL_CONTROL | SRIO Lane Status |
| SRIO_PLM_POLARITY_CONTROL | SRIO PLM Polarity Control |
| SRIO_PLM_VMIN_EXPONENT | SRIO PLM VMin Exponent |
| SRIO_TLM_CONTROL | SRIO TLM Control Configuration |
| SRIO_TYPE9_MESSAGE | SRIO Type 9 Message Description |
| VCP2_BaseParams | |
| VCP2_ConfigIc | |
| VCP2_Errors | |
| VCP2_Params | |
| VCP2_PID | |
| VCP2_Poly | |
| VCP2BaseAddress | |
| VCP2Obj |