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- b -
bAddr :
CSL_XMC_XMPAXH
BaseAddress :
CSL_Aif2DbChannel
bcastLimit :
CSL_CPSW_3GF_ALE_PORTCONTROL
bChannelEn :
CSL_Aif2PdChConfig
BcnTableSelect :
CSL_Aif2AdDioEngine
bCpriPktEnable :
CSL_Aif2PeChRuleLut
bCrcEn :
CSL_Aif2PeDmaCh0
bEnableAxC :
CSL_Aif2PeChannelConfig
bEnableCh :
CSL_Aif2PeCommonSetup
bEnableChannel :
CSL_Aif2IngrDbSetup
,
CSL_Aif2EgrDbSetup
bEnableChIndex :
CSL_Aif2PeChRuleLut
bEnableChIndex0 :
CSL_Aif2PeCommonSetup
bEnableChIndex1 :
CSL_Aif2PeCommonSetup
bEnableChIndex2 :
CSL_Aif2PeCommonSetup
bEnableChIndex3 :
CSL_Aif2PeCommonSetup
bEnableChIndex4 :
CSL_Aif2PeCommonSetup
bEnableChIndex5 :
CSL_Aif2PeCommonSetup
bEnableChIndex6 :
CSL_Aif2PeCommonSetup
bEnableChIndex7 :
CSL_Aif2PeCommonSetup
bEnableClockQuality :
CSL_Aif2RmLinkSetup
bEnableCpriCrc :
CSL_Aif2PdLinkSetup
bEnableCpriCw :
CSL_Aif2PdLinkSetup
,
CSL_Aif2PeLinkSetup
,
CSL_Aif2CpriCwLut
bEnableCpriPkt :
CSL_Aif2PdCpriIdLut
,
CSL_Aif2PdLinkSetup
bEnableCpriX :
CSL_Aif2PdLinkSetup
,
CSL_Aif2PdCpriIdLut
bEnableCrc :
CSL_Aif2PdTypeLut
bEnableCrcHeader :
CSL_Aif2PdTypeLut
bEnableEgrDb :
CSL_Aif2EgrDbSetup
bEnableEgrDioEvent :
CSL_Aif2AtEventSetup
bEnableEmptyMsg :
CSL_Aif2RtLinkSetup
bEnableEnetStrip :
CSL_Aif2PdTypeLut
bEnableIngrDb :
CSL_Aif2IngrDbSetup
bEnableIngrDioEvent :
CSL_Aif2AtEventSetup
bEnableLcvControl :
CSL_Aif2RmLinkSetup
bEnableLcvUnsync :
CSL_Aif2RmLinkSetup
bEnablePack :
CSL_Aif2PdLinkSetup
,
CSL_Aif2PeLinkSetup
bEnablePdLink :
CSL_Aif2PdLinkSetup
bEnablePeLink :
CSL_Aif2PeLinkSetup
bEnablePllB4 :
CSL_Aif2SdCommonSetup
bEnablePllB8 :
CSL_Aif2SdCommonSetup
bEnablePsData :
CSL_Aif2DbChannel
bEnableRadEvent :
CSL_Aif2AtEventSetup
bEnableRmLink :
CSL_Aif2RmLinkSetup
bEnableRmLos :
CSL_Aif2TmLinkSetup
bEnableRule :
CSL_Aif2ModuloTc
bEnableScrambler :
CSL_Aif2RmLinkSetup
,
CSL_Aif2TmLinkSetup
bEnableSdAutoAlign :
CSL_Aif2RmLinkSetup
bEnableTmLink :
CSL_Aif2TmLinkSetup
bEnableTxSyncMater :
CSL_Aif2SdLinkSetup
bEnableWatchDog :
CSL_Aif2RmLinkSetup
bEnDioBufferRead :
CSL_Aif2DbSideData
bEnDioBufferWrite :
CSL_Aif2DbSideData
bEnDmaChannel :
CSL_Aif2AdDioEngine
bEnEgressRsaFormat :
CSL_Aif2AdDioEngine
bEnFifoBufferWrite :
CSL_Aif2DbSideData
bEnObsaiBubbleBW :
CSL_Aif2PeLinkSetup
bEop :
CSL_Aif2DbSideData
betiWdStat :
CSL_TAC_BEII_interruptStatus
bIsAutoNegComplete :
CSL_SGMII_STATUS
bIsAutoNegError :
CSL_SGMII_STATUS
bIsLinkUp :
CSL_SGMII_STATUS
bIsLocked :
CSL_SGMII_STATUS
bLinkIntEnable :
CSL_MDIO_USERPHYSEL
bLinkUp :
CSL_SGMII_ADVABILITY
blockEnable :
CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY
,
CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY
bmBuffLen :
VCP2_Params
bRuleObsaiCtlMsg :
CSL_Aif2ModuloTc
bRxEqHold :
CSL_Aif2SdLinkSetup
bRxOffsetComp :
CSL_Aif2SdLinkSetup
bSop :
CSL_Aif2DbSideData
bTsWatchDogEn :
CSL_Aif2PdChConfig1
bTxFirFilterUpdate :
CSL_Aif2SdLinkSetup
BufDepth :
CSL_Aif2DbChannel
Copyright 2011, Texas Instruments Incorporated
