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| void CSL_TAC_FE_clearTransErrorIntStatus | ( | ) |
CSL_TAC_FE_clearTransErrorIntStatus
Description
This function clears the error flag set in the Front-End Transaction Error Interrupt Status register.
Arguments
None
Return Value
None
Pre Condition
None
Post Condition
The FE transaction error interrupt status is cleared.
Writes
TAC_CFG_FE_TRANS_INT_ERROR_FLAG=1
Example
CSL_TAC_FE_clearTransErrorIntStatus();
| void CSL_TAC_FE_disable | ( | ) |
CSL_TAC_FE_disable
Description
This function disables the TAC Front End Interface (FEI).
Arguments
None
Return Value
None
Pre Condition
None
Post Condition
The Front End Interface is disabled.
Writes
TAC_CFG_FE_ENA_ENABLE=0
Affects
TAC_CFG_FE_STAT_STATUS=0
Example
CSL_TAC_FE_disable();
| void CSL_TAC_FE_enable | ( | ) |
CSL_TAC_FE_enable
Description
This function enables the TAC Front End Interface (FEI).
Arguments
None
Return Value
None
Pre Condition
None
Post Condition
The Front End Interface is enabled.
Writes
TAC_CFG_FE_ENA_ENABLE=1
Affects
TAC_CFG_FE_STAT_STATUS=1
Example
CSL_TAC_FE_enable();
| Uint8 CSL_TAC_FE_getCPMPriority | ( | ) |
CSL_TAC_FE_getCPMPriority
Description
This function returns the CPM Transfer Priority for the VBUS transfers.
Arguments
None
Return Value
The CPM Transfer Priority [0..7].
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_CPM_PRIO_PRIORITY
Example
Uint8 prio;
// Set the priority to 3
CSL_TAC_FE_setCPMPriority(3);
// Read the priority
prio = CSL_TAC_FE_getCPMPriority();
// prio should be 3
| Uint8 CSL_TAC_FE_getDataPriority | ( | ) |
CSL_TAC_FE_getDataPriority
Description
This function returns the Data Transfer Priority for the VBUS transfers.
Arguments
None
Return Value
The Data Transfer Priority [0..7].
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_DATA_PRIO_PRIORITY
Example
Uint8 prio;
// Set the priority to 3
CSL_TAC_FE_setDataPriority(3);
// Read the priority
prio = CSL_TAC_FE_getDataPriority();
// prio should be 3
| CSL_TAC_FE_enableStatus CSL_TAC_FE_getEnableStatus | ( | ) |
CSL_TAC_FE_getEnableStatus
Description
This function returns the enable status of the Front-End.
Arguments
None
Return Value
CSL_TAC_FE_Disabled The Front-End is disabled.
CSL_TAC_FE_Enabled The Front-End is enabled.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_STAT_STATUS
Example
CSL_TAC_FE_enable();
if (CSL_TAC_FE_getEnableStatus() != CSL_TAC_FE_Enabled)
{
// The FE should have been enabled.
...
}
...
CSL_TAC_FE_disable();
if (CSL_TAC_FE_getEnableStatus() != CSL_TAC_FE_Disabled)
{
// The FE should have been disabled.
...
}
| Uint8 CSL_TAC_FE_getHeadPriority | ( | ) |
CSL_TAC_FE_getHeadPriority
Description
This function returns the Header Transfer Priority for the VBUS transfers.
Arguments
None
Return Value
The Header Transfer Priority [0..7].
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_HEAD_PRIO_PRIORITY
Example
Uint8 prio;
// Change the priority to 3
CSL_TAC_FE_setHeadPriority(3);
// Read the priority again
prio = CSL_TAC_FE_getHeadPriority();
// prio should be 3
| void CSL_TAC_FE_getPeripheralID | ( | CSL_TAC_FE_PeripheralId_req * | peripheralId | ) |
CSL_TAC_FE_getPeripheralID
Description
This function reads the content of the Peripheral Id register and returns the revision information.
Arguments
peripheralId Structure with the peripheral revision information.
Return Value
None
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_PID_MIN_REV_NB, TAC_CFG_FE_PID_CUS_REV_NB, TAC_CFG_FE_PID_MAJ_REV_NB, TAC_CFG_FE_PID_RTL_REV_NB, TAC_CFG_FE_PID_PID, TAC_CFG_FE_PID_SCHEME
Example
CSL_TAC_FE_PeripheralId_req pid;
CSL_TAC_FE_getPeripheralID(&pid);
| CSL_TAC_FE_resetStatus CSL_TAC_FE_getResetStatus | ( | ) |
CSL_TAC_FE_getResetStatus
Description
This function returns the reset status of the Front-End.
Arguments
None
Return Value
CSL_TAC_FE_Reset The Front-End is in reset state.
CSL_TAC_FE_NotReset The Front-End is not in reset state.
Pre Condition
None
Post Condition
The HW takes as long as it needs to perform the reset on all state machines, queues and counters. During that time, the SW can poll the same register and the reset flag bit remains equal to 1. When the reset process is finished, the HW clears the reset flag bit to 0. The SW knows then that the reset process has been completed.
Reads
TAC_CFG_FE_SW_RESET_RESET
Example
...
while(CSL_TAC_FE_getResetStatus() == CSL_TAC_FE_NotReset)
{
// The FE is not reset yet.
...
}
| CSL_TAC_FE_statusBit CSL_TAC_FE_getStatus | ( | ) |
CSL_TAC_FE_getStatus
Description
This function returns the Front End Transfer State.
Arguments
None
Return Value
CSL_TAC_FE_status_Idle The FE is idle.
CSL_TAC_FE_status_Busy The FE is busy.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_STAT_STATUS
Example
CSL_TAC_FE_statusBit feStatus;
feStatus = CSL_TAC_FE_getStatus();
| void CSL_TAC_FE_getTransErrorIntStatus | ( | CSL_TAC_FE_transErrorInterruptStatus * | transErrIntStatus | ) |
CSL_TAC_FE_getTransErrorIntStatus
Description
This function returns the Front-End Transaction Error Interrupt Status.
Arguments
transErrIntStatus Structure with the Transaction Error Interrupt Status.
Return Value
None
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_TRANS_INT_MASTER_ID, TAC_CFG_FE_TRANS_INT_TRANS_ID, TAC_CFG_FE_TRANS_INT_ERROR_FLAG
Example
CSL_TAC_FE_transErrorInterruptStatus status;
...
CSL_TAC_FE_getTransErrorIntStatus(&status);
| Uint8 CSL_TAC_FE_getWarnPriority | ( | ) |
CSL_TAC_FE_getWarnPriority
Description
This function returns the Warning Transfer Priority for the VBUS transfers.
Arguments
None
Return Value
The Warning Transfer Priority [0..7].
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_WARN_PRIO_PRIORITY
Example
Uint8 prio;
// Set the priority to 3
CSL_TAC_FE_setWarnPriority(3);
// Read the priority
prio = CSL_TAC_FE_getWarnPriority();
// prio should be 3
| void CSL_TAC_FE_getWatchDogStatus | ( | CSL_TAC_FE_wdStatus * | wdStatus | ) |
CSL_TAC_FE_getWatchDogStatus
Description
This function returns the FE watch dog configuration.
Arguments
wdStatus Structure with Watchdog parameters.
Return Value None
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_FE_TRANS_CFG_ENABLE_FLAG, TAC_CFG_FE_TRANS_CFG_INIT_VALUE
Example
CSL_TAC_FE_wdStatus wdStatus;
CSL_TAC_FE_wdStatus rdWdStatus;
wdStatus.enableFlag = CSL_TAC_FE_wdInterrupt_Enable;
wdStatus.initCount = 1023;
// Enable the FE Watchdog and set the count to 1023
CSL_TAC_FE_setWatchDog(&wdStatus);
// Read the FE Watchdog status
CSL_TAC_FE_getWatchDogStatus(&rdWdStatus);
if (rdWdStatus.enableFlag != wdStatus.enableFlag)
{
// The watchdog should have been enabled
...
}
else if (rdWdStatus.initCount != wdStatus.initCount)
{
// The watchdog count should be the same
...
}
// Disable the FE Watchdog. The count is not important so any value
// can be used.
wdStatus.enableFlag = CSL_TAC_FE_wdInterrupt_Disable;
CSL_TAC_FE_setWatchDog(&wdStatus);
// Read the FE Watchdog status
CSL_TAC_FE_getWatchDogStatus(&rdWdStatus);
if (rdWdStatus.enableFlag != wdStatus.enableFlag)
{
// The watchdog should have been disabled
// ...
}
| void CSL_TAC_FE_setCPMPriority | ( | Uint8 | priority | ) |
CSL_TAC_FE_setCPMPriority
Description
This function configures the CPM Transfer Priority for the VBUS transfers.
Arguments
priority VBUS priority to apply to the transfers. The allowed range
is [0..7]. The value out of the reset is 7.
Return Value
None
Pre Condition
None
Post Condition
The CPM Transfer Priority is set.
Writes
TAC_CFG_FE_CPM_PRIO_PRIORITY
Example
Uint8 prio;
// Reset the Front End
CSL_TAC_FE_softwareReset();
// Check for the reset status
while(CSL_TAC_FE_getResetStatus() == CSL_TAC_FE_NotReset);
// Read the priority
prio = CSL_TAC_FE_getCPMPriority();
// prio should be 7
// Change the priority to 3
CSL_TAC_FE_setCPMPriority(3);
// Read the priority again
prio = CSL_TAC_FE_getCPMPriority();
// prio should be 3
| void CSL_TAC_FE_setDataPriority | ( | Uint8 | priority | ) |
CSL_TAC_FE_setDataPriority
Description
This function configures the Data Transfer Priority for the VBUS transfers.
Arguments
priority VBUS priority to apply to the transfers. The allowed range
is [0..7]. The value out of the reset is 7.
Return Value
None
Pre Condition
None
Post Condition
The Data Transfer Priority is set.
Writes
TAC_CFG_FE_DATA_PRIO_PRIORITY
Example
Uint8 prio;
// Reset the Front End
CSL_TAC_FE_softwareReset();
// Check for the reset status
while(CSL_TAC_FE_getResetStatus() == CSL_TAC_FE_NotReset);
// Read the priority
prio = CSL_TAC_FE_getDataPriority();
// prio should be 7
// Change the priority to 3
CSL_TAC_FE_setDataPriority(3);
// Read the priority again
prio = CSL_TAC_FE_getDataPriority();
// prio should be 3
| void CSL_TAC_FE_setHeadPriority | ( | Uint8 | priority | ) |
CSL_TAC_FE_setHeadPriority
Description
This function configures the Header Transfer Priority for the VBUS transfers.
Arguments
priority VBUS priority to apply to the transfers. The allowed range
is [0..7]. The value out of the reset is 7.
Return Value
None
Pre Condition
None
Post Condition
The Header Transfer Priority is set.
Writes
TAC_CFG_FE_HEAD_PRIO_PRIORITY
Example
Uint8 prio;
// Reset the Front End
CSL_TAC_FE_softwareReset();
// Check for the reset status
while(CSL_TAC_FE_getResetStatus() == CSL_TAC_FE_NotReset);
// Read the priority
prio = CSL_TAC_FE_getHeadPriority();
// prio should be 7
// Change the priority to 3
CSL_TAC_FE_setHeadPriority(3);
// Read the priority again
prio = CSL_TAC_FE_getHeadPriority();
// prio should be 3
| void CSL_TAC_FE_setWarnPriority | ( | Uint8 | priority | ) |
CSL_TAC_FE_setWarnPriority
Description
This function configures the Warning Transfer Priority for the VBUS transfers.
Arguments
priority VBUS priority to apply to the transfers. The allowed range
is [0..7]. The value out of the reset is 7.
Return Value
None
Pre Condition
None
Post Condition
The Warning Transfer Priority is set.
Writes
TAC_CFG_FE_WARN_PRIO_PRIORITY
Example
Uint8 prio;
// Reset the Front End
CSL_TAC_FE_softwareReset();
// Check for the reset status
while(CSL_TAC_FE_getResetStatus() == CSL_TAC_FE_NotReset);
// Read the priority
prio = CSL_TAC_FE_getWarnPriority();
// prio should be 7
// Change the priority to 3
CSL_TAC_FE_setWarnPriority(3);
// Read the priority again
prio = CSL_TAC_FE_getWarnPriority();
// prio should be 3
| void CSL_TAC_FE_setWatchDog | ( | CSL_TAC_FE_wdStatus * | wdStatus | ) |
CSL_TAC_FE_setWatchDog
Description
This function configures the watch dog in the FE.
Arguments
wdStatus Structure with Watchdog parameters.
Return Value None
Pre Condition
None
Post Condition
The Front-End watch-dog is configured.
Writes
TAC_CFG_FE_TRANS_CFG_ENABLE_FLAG, TAC_CFG_FE_TRANS_CFG_INIT_VALUE
Example
CSL_TAC_FE_wdStatus wdStatus;
wdStatus.enableFlag = CSL_TAC_FE_wdInterrupt_Enable;
wdStatus.initCount = 1023;
// Enable the FE Watchdog and set the count to 1023
CSL_TAC_FE_setWatchDog(&wdStatus);
...
// Disable the FE Watchdog. The count is not important so any value
// can be used.
wdStatus.enableFlag = CSL_TAC_FE_wdInterrupt_Disable;
CSL_TAC_FE_setWatchDog(&wdStatus);
| void CSL_TAC_FE_softwareReset | ( | ) |
CSL_TAC_FE_softwareReset
Description
This function resets the Front-End.
Arguments
None
Return Value
None
Pre Condition
None
Post Condition
The HW takes as long as it needs to perform the reset on all state machines, queues and counters. During that time, the SW can poll the same register and the reset flag bit remains equal to 1. When the reset process is finished, the HW clears the reset flag bit to 0. The SW knows then that the reset process has been completed.
Writes
TAC_CFG_FE_SW_RESET_RESET=1
Affects
TAC_CFG_FE_SW_RESET_RESET=0
Example
CSL_TAC_FE_softwareReset();
| Uint16 CSL_TAC_Stats_getCfgReadAccess | ( | ) |
CSL_TAC_Stats_getCfgReadAccess
Description
This function reads the content of the statistics register for the total number of read data phases used by the Configuration interface.
Arguments
None
Return Value
The count of the total number of read accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_CFG_READ_RD_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getCfgReadAccess();
| Uint16 CSL_TAC_Stats_getCfgTotalAccess | ( | ) |
CSL_TAC_Stats_getCfgTotalAccess
Description
This function reads the content of the statistics register for the total number of data phases used by the Configuration interface.
Arguments
None
Return Value
The count of the total number of accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_CFG_TOT_TOT_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getCfgTotalAccess();
| Uint16 CSL_TAC_Stats_getCfgWriteAccess | ( | ) |
CSL_TAC_Stats_getCfgWriteAccess
Description
This function reads the content of the statistics register for the total number of write data phases used by the Configuration interface.
Arguments
None
Return Value
The count of the total number of write accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_CFG_WRIT_WR_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getCfgWriteAccess();
| Uint16 CSL_TAC_Stats_getMasterReadAccess | ( | ) |
CSL_TAC_Stats_getMasterReadAccess
Description
This function reads the content of the statistics register for the total number of read data phases used by the DMA Master interface.
Arguments
None
Return Value
The count of the total number of read accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_MST_READ_RD_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getMasterReadAccess();
| Uint16 CSL_TAC_Stats_getMasterTotalAccess | ( | ) |
CSL_TAC_Stats_getMasterTotalAccess
Description
This function reads the content of the statistics register for the total number of data phases used by the DMA Master interface.
Arguments
None
Return Value
The count of the total number of accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_MST_TOT_TOT_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getMasterTotalAccess();
| Uint16 CSL_TAC_Stats_getMasterWriteAccess | ( | ) |
CSL_TAC_Stats_getMasterWriteAccess
Description
This function reads the content of the statistics register for the total number of write data phases used by the DMA Master interface.
Arguments
None
Return Value
The count of the total number of write accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_MST_WRIT_WR_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getMasterWriteAccess();
| Uint16 CSL_TAC_Stats_getSlaveReadAccess | ( | ) |
CSL_TAC_Stats_getSlaveReadAccess
Description
This function reads the content of the statistics register for the total number of read data phases used by the DMA Slave interface.
Arguments
None
Return Value
The count of the total number of read accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_SLV_READ_RD_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getSlaveReadAccess();
| Uint16 CSL_TAC_Stats_getSlaveTotalAccess | ( | ) |
CSL_TAC_Stats_getSlaveTotalAccess
Description
This function reads the content of the statistics register for the total number of data phases used by the DMA slave interface.
Arguments
None
Return Value
The count of the total number of accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_SLV_TOT_TOT_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getSlaveTotalAccess();
| Uint16 CSL_TAC_Stats_getSlaveWriteAccess | ( | ) |
CSL_TAC_Stats_getSlaveWriteAccess
Description
This function reads the content of the statistics register for the total number of write data phases used by the DMA Slave interface.
Arguments
None
Return Value
The count of the total number of write accesses.
Pre Condition
None
Post Condition
None
Reads
TAC_CFG_SLV_WRIT_WR_ACC_NB
Example
Uint16 accessCnt;
accessCnt = CSL_TAC_Stats_getSlaveWriteAccess();