CSL_Aif2AdDioEngine Struct Reference
[AIF2 Data Structures]

This is a sub-structure in CSL_Aif2AdDioSetup. This structure is used for configuring the parameters of aif2 dma engine. More...

#include <csl_aif2.h>


Data Fields

CSL_Aif2AdBcnTable BcnTableSelect
CSL_Aif2AdNumQWord NumQuadWord
Uint8 NumAxC
CSL_Aif2AdNumQWord DmaBurstLen
Bool bEnEgressRsaFormat
Bool bEnDmaChannel
Uint16 DmaNumBlock
Uint32 DmaBaseAddr
Uint16 DmaBurstAddrStride
Uint16 DmaBlockAddrStride
Uint8 DBCN [64]

Detailed Description

This is a sub-structure in CSL_Aif2AdDioSetup. This structure is used for configuring the parameters of aif2 dma engine.

Field Documentation

CSL_Aif2AdBcnTable CSL_Aif2AdDioEngine::BcnTableSelect

Selects which buffer channel number table for the DMA engine to use

CSL_Aif2AdNumQWord CSL_Aif2AdDioEngine::NumQuadWord

Sets the number of quad words per AxC

Uint8 CSL_Aif2AdDioEngine::NumAxC

Sets the number of quad words per AxC

CSL_Aif2AdNumQWord CSL_Aif2AdDioEngine::DmaBurstLen

Sets the maximum DMA burst length

Bool CSL_Aif2AdDioEngine::bEnEgressRsaFormat

enable or disable Egress DIO RSA data type format

Bool CSL_Aif2AdDioEngine::bEnDmaChannel

enable or disable DIO DMA channel

Uint16 CSL_Aif2AdDioEngine::DmaNumBlock

Set the number of data blocks to transfer before wrapping back to dma_base_addr

Uint32 CSL_Aif2AdDioEngine::DmaBaseAddr

Sets the VBUS destination base address (upper 28 bits of 32 bit data bus).

Uint16 CSL_Aif2AdDioEngine::DmaBurstAddrStride

Sets the DMA burst address stride (in multiples of 0x10). After each DMA burst, the DMA address will increment by this amount

Uint16 CSL_Aif2AdDioEngine::DmaBlockAddrStride

Sets the DMA block address stride (in multiples of 0x10).

Uint8 CSL_Aif2AdDioEngine::DBCN[64]

Data Buffer Channel Number for total 64 channels

The documentation for this struct was generated from the following file:
Copyright 2011, Texas Instruments Incorporated