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#include <csl_aif2.h>
Phy sync mode selection
Rad sync mode selection
Rp1 mode or not
Auto resync if new frame boundary is received
Crc use or not
Crc flip normal or reverse
Crc init ones is init0 or init1
Crc invert is applied or not
RP1 sync_sampl_window value = size - 1
RP1 RADT Frame Load selection (8bit ~ 40bits)
RP1 PHYT Frame Load selection (8bit ~ 40bits)
Phyt compare value when when radt sync is selected to CSL_AIF2_PHYT_CMP_SYNC
RP1 RAD Type Select
WCDMA value Divide terminal count to make WCDMA counter working 3.84 MHz sample rate
timer Init structure for Phy and Rad(Ul,Dl)
timer terminal count and LUT structure for Phy and Rad(Ul,Dl)
T count structure for GSM