CSL_Aif2PdLinkSetup Struct Reference
[AIF2 Data Structures]

This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of protocol decoder. More...

#include <csl_aif2.h>


Data Fields

Bool bEnablePdLink
Uint8 CpriEnetStrip
Uint8 Crc8Poly
Uint8 Crc8Seed
CSL_Aif2CpriCwPktDelim CpriCwPktDelimitor [4]
Uint16 CpriCwNullDelimitor
Uint8 PdPackDmaCh [4]
Bool bEnablePack [4]
CSL_Aif2CrcLen PdCpriCrcType [4]
Bool bEnableCpriCrc [4]
CSL_Aif2DualBitMap PdCpriDualBitMap
CSL_Aif2PdTypeLut PdTypeLut [32]
Uint8 CpriDmaCh [128]
Bool bEnableCpriX [128]
Bool bEnableCpriPkt [128]
Uint8 Cpri8WordOffset [128]
Uint8 CpriCwChannel [256]
Bool bEnableCpriCw [256]


Detailed Description

This is a sub-structure in CSL_Aif2LinkSetup. This structure is used for configuring the parameters of protocol decoder.


Field Documentation

Bool CSL_Aif2PdLinkSetup::bEnablePdLink

Boolean indicating if Pd link is to be enabled

Uint8 CSL_Aif2PdLinkSetup::CpriEnetStrip

CPRI: bit3-0 enables stripping Ethernet headers for chan3-0 OBSAI: unused

Uint8 CSL_Aif2PdLinkSetup::Crc8Poly

CRC: programmable polynomial for CRC8 (other polynomials are fixed)

Uint8 CSL_Aif2PdLinkSetup::Crc8Seed

CRC: programmable seed value for CRC8 (other polynomials are fixed)

CSL_Aif2CpriCwPktDelim CSL_Aif2PdLinkSetup::CpriCwPktDelimitor[4]

CRPI Control Word 4B/5B encoding enable for 4 channels

Uint16 CSL_Aif2PdLinkSetup::CpriCwNullDelimitor

CPRI Conrol Word Null Delimitor. Used instead of 4B/5B for packet delimitation. Only used when enabled by CpriCwPktDelimitor fields

Uint8 CSL_Aif2PdLinkSetup::PdPackDmaCh[4]

PD CPRI Pack map structure

Bool CSL_Aif2PdLinkSetup::bEnablePack[4]

enable pd cpri pack

CSL_Aif2CrcLen CSL_Aif2PdLinkSetup::PdCpriCrcType[4]

PD CRC setup structure

Bool CSL_Aif2PdLinkSetup::bEnableCpriCrc[4]

enable pd cpri crc

CSL_Aif2DualBitMap CSL_Aif2PdLinkSetup::PdCpriDualBitMap

Dual bit map structure for Pd CPRI dual bit map rule FSM

CSL_Aif2PdTypeLut CSL_Aif2PdLinkSetup::PdTypeLut[32]

32 Pd Type LUT structure

Uint8 CSL_Aif2PdLinkSetup::CpriDmaCh[128]

DBMF CPRI Stream LUT: AxC:used to map DBM X count to DMA channel. PKT:2 lsb indicates 0-3 PKT packing circuit (assumed 4B/5B encoding)

Bool CSL_Aif2PdLinkSetup::bEnableCpriX[128]

DBMF CPRI Stream LUT: enable-disable of channel, for each value of DBM X count.

Bool CSL_Aif2PdLinkSetup::bEnableCpriPkt[128]

DBMF CPRI Stream LUT: dicates the cpri payload is to be used as AxC (normal) or Packet traffic

Uint8 CSL_Aif2PdLinkSetup::Cpri8WordOffset[128]

Fine AxC offset. Used in the front end of PD to align word data into QWords. bit [1:0] are offset into a QWord. bit[2] give RSA double QWork alignment. Bit[2] and corresponding axc_offset[0] should always be programmed to be identical

Uint8 CSL_Aif2PdLinkSetup::CpriCwChannel[256]

All possible CPRI CW per hyperframe are are mapped to one of four(0~3) CPRI CW staging areas

Bool CSL_Aif2PdLinkSetup::bEnableCpriCw[256]

All possible CPRI CW per hyperframe. Dicatates whether the control word should be captured at all


The documentation for this struct was generated from the following file:
Copyright 2011, Texas Instruments Incorporated