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#include <csl_aif2.h>
Data Fields | |
| Bool | bEnablePeLink |
| CSL_Aif2CppiDio | PeCppiDioSel |
| Bool | TddAxc |
| Bool | bEnObsaiBubbleBW |
| Uint8 | PeDelay |
| Uint8 | Crc8Poly |
| Uint8 | Crc8Seed |
| CSL_Aif2DualBitMap | PeCpriDualBitMap |
| CSL_Aif2CpriAxCPack | CpriAxCPack |
| Uint16 | CpriCwNullDelimitor |
| CSL_Aif2CpriCwPktDelim | CpriCwPktDelimitor [4] |
| Uint8 | PePackDmaCh [4] |
| Bool | bEnablePack [4] |
| Uint8 | CpriCwChannel [256] |
| Bool | bEnableCpriCw [256] |
Boolean indicating if Pe link is to be enabled
For streams that are AxC, use DB as a circular RAM which will feed DIO DMA. (WCDMA use DIO) otherwise, DB is used as a FIFO for AxC traffic and will feed CPPI DMA
AIF2 is tollerant of whole symbols of missing data on AxC-by-AxC basis
enable or disable OBSAI bubble bandwidth
delay (in sys_clks) between DB read and PE processing
CRC: programmable polynomial for CRC8 (other polynomials are fixed)
CRC: programmable starting seed value (CRC16 & CRC32 seed is fixed)
Dual bit map structure for Pe CPRI dual bit map rule FSM
CRPI: identifies the bit precision of the IQ data. Used to un-packing packet data passed over CPRI AxC slots
CPRI Conrol Word Null Delimitor. Used instead of 4B/5B for packet delimitation. Only used when enabled by CpriCwPktDelimitor fields
CRPI Control Word 4B/5B encoding enable for 4 channels
| Uint8 CSL_Aif2PeLinkSetup::PePackDmaCh[4] |
PE CPRI Pack map structure
| Bool CSL_Aif2PeLinkSetup::bEnablePack[4] |
enalbe pe cpri pack
| Uint8 CSL_Aif2PeLinkSetup::CpriCwChannel[256] |
All possible CPRI CW per hyperframe are are mapped to one of four(0~3) CPRI CW staging areas
| Bool CSL_Aif2PeLinkSetup::bEnableCpriCw[256] |
All possible CPRI CW per hyperframe. Dicatates whether the control word should be captured at all