CSL_TmrHwSetup Struct Reference
[TIMER Data Structures]

Hardware setup structure. More...

#include <csl_tmr.h>


Data Fields

Uint32 tmrTimerPeriodLo
Uint32 tmrTimerPeriodHi
Uint32 tmrTimerCounterLo
Uint32 tmrTimerCounterHi
CSL_TmrIpGate tmrIpGateHi
CSL_TmrClksrc tmrClksrcHi
CSL_TmrPulseWidth tmrPulseWidthHi
CSL_TmrClockPulse tmrClockPulseHi
CSL_TmrInvInp tmrInvInpHi
CSL_TmrInvOutp tmrInvOutpHi
CSL_TmrIpGate tmrIpGateLo
CSL_TmrClksrc tmrClksrcLo
CSL_TmrPulseWidth tmrPulseWidthLo
CSL_TmrClockPulse tmrClockPulseLo
CSL_TmrInvInp tmrInvInpLo
CSL_TmrInvOutp tmrInvOutpLo
Uint8 tmrPreScalarCounterHi
CSL_TmrMode tmrTimerMode

Detailed Description

Hardware setup structure.

Field Documentation

Uint32 CSL_TmrHwSetup::tmrTimerPeriodLo

32 bit load value to be loaded to Timer Period Register low

Uint32 CSL_TmrHwSetup::tmrTimerPeriodHi

32 bit load value to be loaded to Timer Period Register High

Uint32 CSL_TmrHwSetup::tmrTimerCounterLo

32 bit load value to be loaded to Timer Counter Register Low

Uint32 CSL_TmrHwSetup::tmrTimerCounterHi

32 bit load value to be loaded to Timer Counter Register High

CSL_TmrIpGate CSL_TmrHwSetup::tmrIpGateHi

TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0

CSL_TmrClksrc CSL_TmrHwSetup::tmrClksrcHi

CLKSRC determines the selected clock source for the timer

CSL_TmrPulseWidth CSL_TmrHwSetup::tmrPulseWidthHi

Pulse width. used in pulse mode (C/P_=0) by the timer

CSL_TmrClockPulse CSL_TmrHwSetup::tmrClockPulseHi

Clock/Pulse mode for timerHigh output

CSL_TmrInvInp CSL_TmrHwSetup::tmrInvInpHi

Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin

CSL_TmrInvOutp CSL_TmrHwSetup::tmrInvOutpHi

Timer output inverter control

CSL_TmrIpGate CSL_TmrHwSetup::tmrIpGateLo

TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0

CSL_TmrClksrc CSL_TmrHwSetup::tmrClksrcLo

CLKSRC determines the selected clock source for the timer

CSL_TmrPulseWidth CSL_TmrHwSetup::tmrPulseWidthLo

Pulse width. used in pulse mode (C/P_=0) by the timer

CSL_TmrClockPulse CSL_TmrHwSetup::tmrClockPulseLo

Clock/Pulse mode for timerLow output

CSL_TmrInvInp CSL_TmrHwSetup::tmrInvInpLo

Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin

CSL_TmrInvOutp CSL_TmrHwSetup::tmrInvOutpLo

Timer output inverter control

Uint8 CSL_TmrHwSetup::tmrPreScalarCounterHi

CNTHI pre-scalar counter specifies the count for CNTHI

CSL_TmrMode CSL_TmrHwSetup::tmrTimerMode

Configures the GP timer in GP mode or in general purpose timer mode or Dual 32 bit timer mode

The documentation for this struct was generated from the following file:
Copyright 2011, Texas Instruments Incorporated