/dts-v1/; #include "am33xx.dtsi" #include / { model = "xxx"; compatible = "xxx", "ti,am33xx"; cpus { cpu@0 { }; }; chosen { stdout-path = &uart0; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; leds { pinctrl-names = "default"; pinctrl-0 = <&mygpio1_pins_default>; compatible = "gpio_leds"; led0 { label = "heartbeat"; gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led1 { label = "cpu0"; gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cpu0"; default-state = "off"; }; led2 { label = "mmc1"; gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc1"; default-state = "off"; }; led3 { label = "eth0"; gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; linux,default-trigger = "eth0"; default-state = "off"; }; }; jtag { pinctrl-names = "default"; pinxtrl-0 = <&mydebugss1_pins_default>; }; vmmcsd_fixed: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; wlan_1_en_reg: fixedregulator@1 { compatible = "regulator-fixed"; regulator-name = "wlan-1-en-regulator"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; startup-delay-us = <70000>; gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* v8 */ enable-active-high; }; }; &am33xx_pinmux { pinctrl-names = "default"; myrtc1_pins_default: myrtc1_pins_default { pinctrl-single,pins = < 0x1f8 ( PIN_INPUT | MUX_MODE0 ) /* (B5) RTC_PORz.RTC_PORz */ 0x200 ( PIN_OUTPUT | MUX_MODE0 ) /* (C5) EXT_WAKEUP.EXT_WAKEUP */ 0x1fc ( PIN_INPUT | MUX_MODE0 ) /* (C6) PMIC_POWER_EN.PMIC_POWER_EN */ 0x204 ( PIN_INPUT | MUX_MODE0 ) /* (B4) ENZ_KALDO_1P8V.ENZ_KALDO_1P8V */ >; }; mydebugss1_pins_default: mydebugss1_pins_default { pinctrl-single,pins = < 0x1d0 ( PIN_INPUT | MUX_MODE0 ) /* (C11) TMS.TMS */ 0x1d4 ( PIN_INPUT | MUX_MODE0 ) /* (B11) TDI.TDI */ 0x1d8 ( PIN_OUTPUT | MUX_MODE0 ) /* (A11) TDO.TDO */ 0x1dc ( PIN_INPUT | MUX_MODE0 ) /* (A12) TCK.TCK */ 0x1e0 ( PIN_INPUT | MUX_MODE0 ) /* (B10) nTRST.nTRST */ 0x1e4 ( PIN_INPUT | MUX_MODE0 ) /* (C14) EMU0.EMU0 */ 0x1e8 ( PIN_INPUT | MUX_MODE0 ) /* (B14) EMU1.EMU1 */ >; }; mygpio1_pins_default: mygpio1_pins_default { pinctrl-single,pins = < 0x164 ( PIN_INPUT | MUX_MODE7 ) /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ 0x120 ( PIN_INPUT | MUX_MODE7 ) /* (K15) gmii1_txd2.gpio0[17] */ 0x1b0 ( PIN_OUTPUT | MUX_MODE7 ) /* (A15) xdma_event_intr0.gpio0[19] */ 0x74 ( PIN_INPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] */ >; }; mygpio2_pins_default: mygpio2_pins_default { pinctrl-single,pins = < 0x90 ( PIN_INPUT | MUX_MODE7 ) /* (R7) gpmc_advn_ale.gpio2[2] */ 0x94 ( PIN_INPUT | MUX_MODE7 ) /* (T7) gpmc_oen_ren.gpio2[3] */ 0x98 ( PIN_INPUT | MUX_MODE7 ) /* (U6) gpmc_wen.gpio2[4] */ 0x9c ( PIN_INPUT | MUX_MODE7 ) /* (T6) gpmc_be0n_cle.gpio2[5] */ >; }; mygpio3_pins_default: mygpio3_pins_default { pinctrl-single,pins = < 0x190 ( PIN_INPUT | MUX_MODE7 ) /* (A13) mcasp0_aclkx.gpio3[14] */ 0x194 ( PIN_INPUT | MUX_MODE7 ) /* (B13) mcasp0_fsx.gpio3[15] */ 0x1a0 ( PIN_INPUT | MUX_MODE7 ) /* (B12) mcasp0_aclkr.gpio3[18] */ 0x1ac ( PIN_INPUT | MUX_MODE7 ) /* (A14) mcasp0_ahclkx.gpio3[21] */ >; }; mygpio4_pins_default: mygpio4_pins_default { pinctrl-single,pins = < 0x0 ( PIN_OUTPUT | MUX_MODE7 ) /* (U7) gpmc_ad0.gpio1[0] */ 0x4 ( PIN_OUTPUT | MUX_MODE7 ) /* (V7) gpmc_ad1.gpio1[1] */ 0x8 ( PIN_OUTPUT | MUX_MODE7 ) /* (R8) gpmc_ad2.gpio1[2] */ 0xc ( PIN_OUTPUT | MUX_MODE7 ) /* (T8) gpmc_ad3.gpio1[3] */ 0x50 ( PIN_OUTPUT | MUX_MODE7 ) /* (R14) gpmc_a4.gpio1[20] */ 0x54 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (V15) gpmc_a5.gpio1[21] */ >; }; wlan_disc_1_pins: wlan_disc_1_pins { pinctrl-single,pins = < 0x18 ( PIN_INPUT | MUX_MODE7 ) /* (R9) gpmc_ad6.gpio1[6] */ 0x14 ( PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* (V8) gpmc_ad5.gpio1[5] */ 0x10 ( PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* (U8) gpmc_ad4.gpio1[4] */ >; }; myglue1_pins_default: myglue1_pins_default { pinctrl-single,pins = < 0x1b8 ( PIN_INPUT | MUX_MODE0 ) /* (A10) nRESETIN_OUT.nRESETIN_OUT */ 0x1c0 ( PIN_INPUT | MUX_MODE0 ) /* (B18) nNMI.nNMI */ >; }; mymdio1_pins_default: mymdio1_pins_default { pinctrl-single,pins = < 0x14c ( PIN_OUTPUT | MUX_MODE0 ) /* (M18) mdio_clk.mdio_clk */ 0x148 ( PIN_INPUT | MUX_MODE0 ) /* (M17) mdio_data.mdio_data */ 0x11c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (J18) gmii1_txd3.gpio0[16] */ >; }; myrmii1_pins_default: myrmii1_pins_default { pinctrl-single,pins = < 0x10c ( PIN_INPUT | MUX_MODE1 ) /* (H17) gmii1_crs.rmii1_crs_dv */ 0x110 ( PIN_INPUT | MUX_MODE1 ) /* (J15) gmii1_rxer.rmii1_rxer */ 0x114 ( PIN_OUTPUT | MUX_MODE1 ) /* (J16) gmii1_txen.rmii1_txen */ 0x128 ( PIN_OUTPUT | MUX_MODE1 ) /* (K17) gmii1_txd0.rmii1_txd0 */ 0x124 ( PIN_OUTPUT | MUX_MODE1 ) /* (K16) gmii1_txd1.rmii1_txd1 */ 0x140 ( PIN_INPUT | MUX_MODE1 ) /* (M16) gmii1_rxd0.rmii1_rxd0 */ 0x13c ( PIN_INPUT | MUX_MODE1 ) /* (L15) gmii1_rxd1.rmii1_rxd1 */ 0x144 ( PIN_INPUT | MUX_MODE0 ) /* (H18) rmii1_refclk.rmii1_refclk */ >; }; mymmc1_pins_default: mymmc1_pins_default { pinctrl-single,pins = < 0x100 ( PIN_INPUT | MUX_MODE0 ) /* (G17) mmc0_clk.mmc0_clk */ 0x104 ( PIN_INPUT | MUX_MODE0 ) /* (G18) mmc0_cmd.mmc0_cmd */ 0xfc ( PIN_INPUT | MUX_MODE0 ) /* (G16) mmc0_dat0.mmc0_dat0 */ 0xf8 ( PIN_INPUT | MUX_MODE0 ) /* (G15) mmc0_dat1.mmc0_dat1 */ 0xf4 ( PIN_INPUT | MUX_MODE0 ) /* (F18) mmc0_dat2.mmc0_dat2 */ 0xf0 ( PIN_INPUT | MUX_MODE0 ) /* (F17) mmc0_dat3.mmc0_dat3 */ 0x138 ( PIN_INPUT | MUX_MODE3 ) /* (L16) gmii1_rxd2.mmc0_dat4 */ 0x134 ( PIN_INPUT | MUX_MODE3 ) /* (L17) gmii1_rxd3.mmc0_dat5 */ 0x130 ( PIN_INPUT | MUX_MODE3 ) /* (L18) gmii1_rxclk.mmc0_dat6 */ 0x12c ( PIN_INPUT | MUX_MODE3 ) /* (K18) gmii1_txclk.mmc0_dat7 */ >; }; mymmc2_pins_default: mymmc2_pins_default { pinctrl-single,pins = < 0x8c ( PIN_INPUT | MUX_MODE3 ) /* (V12) gpmc_clk.mmc2_clk */ 0x88 ( PIN_INPUT | MUX_MODE3 ) /* (T13) gpmc_csn3.mmc2_cmd */ 0x44 ( PIN_INPUT | MUX_MODE3 ) /* (V14) gpmc_a1.mmc2_dat0 */ 0x48 ( PIN_INPUT | MUX_MODE3 ) /* (U14) gpmc_a2.mmc2_dat1 */ 0x4c ( PIN_INPUT | MUX_MODE3 ) /* (T14) gpmc_a3.mmc2_dat2 */ 0x78 ( PIN_INPUT | MUX_MODE3 ) /* (U18) gpmc_be1n.mmc2_dat3 */ >; }; myi2c1_pins_default: myi2c1_pins_default { pinctrl-single,pins = < 0x18c ( PIN_INPUT | MUX_MODE0 ) /* (C16) I2C0_SCL.I2C0_SCL */ 0x188 ( PIN_INPUT | MUX_MODE0 ) /* (C17) I2C0_SDA.I2C0_SDA */ >; }; myusb1_pins_default: myusb1_pins_default { pinctrl-single,pins = < 0x21c ( PIN_OUTPUT | MUX_MODE0 ) /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */ >; }; myspi1_pins_default: myspi1_pins_default { pinctrl-single,pins = < 0x150 ( PIN_INPUT | MUX_MODE0 ) /* (A17) spi0_sclk.spi0_sclk */ 0x154 ( PIN_INPUT | MUX_MODE0 ) /* (B17) spi0_d0.spi0_d0 */ 0x158 ( PIN_INPUT | MUX_MODE0 ) /* (B16) spi0_d1.spi0_d1 */ 0x15c ( PIN_INPUT | MUX_MODE0 ) /* (A16) spi0_cs0.spi0_cs0 */ >; }; myuart1_pins_default: myuart1_pins_default { pinctrl-single,pins = < 0x180 ( PIN_INPUT | MUX_MODE0 ) /* (D16) uart1_rxd.uart1_rxd */ 0x184 ( PIN_OUTPUT | MUX_MODE0 ) /* (D15) uart1_txd.uart1_txd */ 0x178 ( PIN_INPUT | MUX_MODE0 ) /* (D18) uart1_ctsn.uart1_ctsn */ 0x17c ( PIN_OUTPUT | MUX_MODE0 ) /* (D17) uart1_rtsn.uart1_rtsn */ >; }; myuart2_pins_default: myuart2_pins_default { pinctrl-single,pins = < 0x170 ( PIN_INPUT | MUX_MODE0 ) /* (E15) uart0_rxd.uart0_rxd */ 0x174 ( PIN_OUTPUT | MUX_MODE0 ) /* (E16) uart0_txd.uart0_txd */ >; }; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&myuart1_pins_default>; status = "okay"; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&myuart2_pins_default>; status = "okay"; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&myi2c1_pins_default>; clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; }; &spi0 { pinctrl-names = "default"; pinctrl-0 = <&myspi1_pins_default>; status = "okay"; flash: mx25u12835f@0 { #address-cells = <1>; #size-cells = <1>; compatible = "macronix,mx25u12835f", "jedec,spi-nor"; spi-max-frequency = <66000000>; reg = <0>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* 0x00000->0x0ffff spl 1 64KiB NLO */ spl@0 { reg = <0x0 0x10000>; }; /* 0x10000->0x8ffff u-boot uboot.img 512KB */ u-boot@10000 { reg = <0x10000 0x80000>; }; /* 0x90000->0x10ffff u-boot1 uboot.img 512KB */ u-boot1@90000 { reg = <0x90000 0x80000>; }; /* 0x110000->0x12ffff env1 128KB */ u-boot-env1@110000 { reg = <0x110000 0x20000>; }; /* 0x130000->0x14ffff env2 128KB */ u-boot-env2@130000 { reg = <0x130000 0x20000>; }; /* 0x150000->0x15ffff key 64KB */ key@150000 { reg = <0x150000 0x10000>; }; /* 0x160000->0x16ffff oemkey 64KB */ oemkey@160000 { reg = <0x160000 0x10000>; }; /* 0x170000 ->0x96ffff emmc.img.gz 8MB */ emmcimggz@170000 { reg = <0x170000 0x800000>; }; /* 0x970000 ->0xffffff empty */ empty@970000 { reg = <0x900000 0x700000>; }; }; }; }; &usb { status = "okay"; }; &usb_ctrl_mod { status = "okay"; }; &usb0_phy { status = "okay"; }; &usb0 { status = "okay"; dr_mode = "host"; /* maximum-speed = "full-speed"; */ }; &cppi41dma { status = "okay"; }; &mmc3 { pinctrl-names = "default"; pinctrl-0 = <&mymmc2_pins_default &wlan_disc_1_pins>; vmmc-supply = <&wlan_1_en_reg>; bus-width = <4>; status = "okay"; ti,non-removable; ti,needs-special-hs-handling; cap-power-off-card; keep-power-in-suspend; #address-cells = <1>; #size-cells = <0>; wlcore@2 { compatible = "ti,wl1831"; reg = <2>; interrupt-parent = <&gpio1>; interrupts = <6 IRQ_TYPE_EDGE_RISING>; }; }; &mmc1 { pinctrl-names = "default"; pinctrl-0 = <&mymmc1_pins_default>; ti,non-removable; bus-width = <8>; status = "okay"; vmmc-supply = <&vmmcsd_fixed>; }; &davinci_mdio { pinctrl-names = "default"; pintctrl-0 = <&mymdio1_pins_default>; status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rmii"; reset-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; }; &phy_sel { rmii-clock-ext; }; &mac { pinctrl-names = "default"; pinctrl-0 = <&myrmii1_pins_default>; status = "okay"; }; &rtc { status = "disabled"; };