Logic

Bus driver for 8 bit parallel bus

Manuel001 — Fri, 20 Nov 2009 07:55:21 GMT

I need a bus driver for 3,3V to 5V conversion of a 8 bit parallel bus (10MHz) with 50cm length.

Are components available with defined rising and falling edge of about 20ns to reduce reflections?

Thanks.

Best regards

Manuel

Using SerDes: SN65LV1023A and SN65LV1224B

Marmota — Fri, 20 Nov 2009 16:23:28 GMT

Hello,

In my new design I want to use the SerDes SN65LV1023A and SN65LV1224B with one clock of 30MHz.

I'm going to use the component in Open-loop and I will use All the 10-bit and I don't see problems to syncronize the 2 components with the start bit and stop bit (Random-Lock Synchronization).

The question is: once the system is locked and reading well all the bits, occurs a problem if the value of 10 bits is the same during 100ms? (the clock is also 30Mhz). I need to implement systems like bit-stuffing?

Thanks!

Marmota

AVC logic family dynamic output control function

Craig Neely — Mon, 16 Nov 2009 07:20:13 GMT

Hi,

I'm curious about the dynamic output control (DOC) circuit discussed in the AVC technology guide SCEA006A.

My question is: do all members of the AVC family have this function? Only a few devices in the family have data sheets that mention it.

For instance -- I'm trying to select a 16-bit level-translator / buffer for my project. The SN74AVCA164245 datasheet mentions the DOC function, while the newer SN74AVC16T245 does not.

The SN74AVC16T245 otherwise seems to be a "better" version of the SN74AVCA164245 -- reduced tpd, reduced leakage, but I'd like to use the DOC circuit if possible.

In my application, I'm using the translator/buffer to drive a fairly long line (about 15cm), at a maximum of around 25 MHz (it's an HPI port on a TI DSP). As the DOC circuit has variable impedance, can anyone give some guidance as to the controlled impedance I should shoot for on the trace to minimize reflections? Ie. what is the nominal driver impedance in the high-drive / low-drive states?

Thanks for the help,

- Craig

SN75LVDT1422 Serdes in clock burst operation?

zziil — Thu, 12 Nov 2009 14:44:31 GMT

Can the SN75LVDT1422 SERDES operate with a burst clock (see customer inquiry, below)?

Will the PLL achieve a faster lock if the clock burst off ime is under the typical PLL lock time?

Customer's Application

GPN: SN75LVDT1422

LGC, Semiconductor Technical Support, www-k.ext.ti.com, SN75LVDT1422

Question about SN75LVDT1422 Hello, I am considering the use of the 1422 in a new design. One of the questions that I have about using this part is how it will respond to my clock signal. In this application, my clock comes in bursts. I am concerned that with a 'gated' clock, that this part may not work. Can you confirm or deny my suspicions? Clock rates are on the order of 100 kHz to 200 kHz depending on the application. Dead times between clock bursts are on the order of 82 uS to 2.9 mS.

Thanks,

Phil

I want typical programing lists for using the TLC59116.

Hiroshi Hashimoto — Mon, 09 Nov 2009 07:47:30 GMT

Hello everyone!

I am Hiroshi in Japan.

I want typical programing lists & programing flow samples,for each registers setting of the TLC59116.

Just now,our customer can't operating the TLC59116. So,our customer is embarrassed.

I can't answering though they asked to me the setting method.

Please give a standard programming list and the sample of the programming flow to me.

Thankyou.

Diferences between SN74HC00DRGA, SN74HC00DR & SN74HC00DRE4

Baltaza Garcia — Wed, 04 Nov 2009 18:50:12 GMT

I am current using IC SN74HC00DRG4 I saw on data sheet another two optios SN74HC00DR & SN74HC00DRE4, Please let me know what is different between these three part numbers.

TXS0102 used in I2C applications

RMcCarthy — Mon, 02 Nov 2009 20:26:05 GMT

Are any pull-ups required for the I2C bus if the TXS0102 is used as a level translator on the bus?

SN74HC109 ICC

mark — Tue, 03 Nov 2009 10:31:30 GMT

Hi All

I used FLUKE 187 multimeter measure the ICC is 1mA, compare the datasheet 40uA is differences

Test condition

VCC=/1CLR=/2CLR=5V

/1PRE=/2PRE=GND=0V

How do I measure max ICC below 40uA?

SN74HC594M :- Input Leakage current

Rajesh — Mon, 02 Nov 2009 15:05:39 GMT

Hi All,

Please let me know what is input leakage current of parallel to serial converter 74HC594...

Input pin Architecture:- HC-Logic NAND gate.

Partial power down problem hct367.

ib mogensen — Wed, 28 Oct 2009 10:10:24 GMT

I need a 74xxx367 witch that has the Ioff = 0 partial power down feature. I do have 5V supply and TTL levels on input and output. Alternatively does PCA9534 have the same feature ?

Can anyone help.

Yours Ib Mogensen

Problem with TL 16C2550

Alejandra López — Thu, 22 Oct 2009 21:14:59 GMT

I am trying to programming the TL16c2550, I can read the default states of the registers, but when I´m trying to write a data in something register, for example to write a data in the line control register or modem control register , and after write some data, I tryed to read the same register I can´t read the writed data. Could you please tell me what is the correct sequence in order to write a data in the uart registers?

I am programming the next steps:

put low state CS

load address to write in the address bus

load data to write in the data bus

put to low IOW

set high IOW

Could you please tell me if this is the sequency correct?

Thanks in advance

SN74AUP1G34

Victor Babkov — Tue, 20 Oct 2009 14:11:19 GMT

SN74LV161284 Vcc and Vcc Cable power supplies.

Peter — Tue, 20 Oct 2009 02:58:33 GMT

Hi,

I am unclear as to the use of two VCC power supplies on this device. The Data Sheet states that the "VCC Cable supplies the output buffers of the cable side only"

From this, I am correct to assume that it supplies the buffers that drive the B1-B8, Y9-Y13 and the PERI LOGIC OUT line?

If so, am I correct to assume that the VCC line supplies the buffers That drive the lines A1-A8, A14-A17 and the Host Logic Out line?

I ask this as I want to be able to disable the buffers that drive the the lines to the peripheral side of the chip, that is, the lines A1-A8, A14-A17 and the Host Logic Out line.

Can I do this by removing the 5V supply from the VCC pin and leave 5V on the VCC Cable pin?.

Thanks,

Peter.

Need a faster 10-bit tri-state buffer than SN74LVC827A

John Randolph — Wed, 14 Oct 2009 23:32:40 GMT

We've got a situation in our current project where we're using the SN74LC827a to implement a mux to switch between two eight-bit BT-656 video sources, and it seems that we've painted ourselves into a corner and the parts just aren't fast enough for our needs.

As near as I can tell from the data sheets, this part was intended for 10Mhz signals, and we need to get 27Mhz data through it. Does the 29287 get us what we need?

Can someone recommend a pin-compatible replacement that will work for signals >50 Mhz? I can be reached at jcr@mac.com.

Thanks,

-jcr

test

KarenFord — Thu, 08 Oct 2009 21:35:10 GMT

test

Using SN74LVC32244

Jeffrey Bledsoe — Wed, 30 Sep 2009 23:03:20 GMT

I have a design where the enable pin of this part is connected to ground (always enabled) and Vcc = 3.3V. The output is pulled up with a 5.6k resistor to 5V.

I see 3.3V on the output pin, even with the pullup.

Possible explanations:

The 3.3 V power supply is sinking current through a body diode in the part

If there's no body diode involved, the part's output can't sink current and the output is at logic 1.

Questions:

Am I on the right track with the current-sink ideas?

We're seeing a lot of noise on the 3.3V at the ouput, enough to dip into the logic '0' range for 3.3V logic. Is this arrangement especially susceptible to noise?

Thanks,

Jeff

PCA9545A and usage with different voltages levels on I2C busses

Søren Steen Christensen — Thu, 03 Sep 2009 08:54:58 GMT

On the first page of http://focus.ti.com/lit/ds/symlink/pca9545a.pdf it's stated that the device can be used for 1.8V operation. Through out the rest of the datasheet 1.8V isn't mentioned, and it seems, that it mainly focuses at 2.5V, 3.3V and 5.0V operation.

Secondly it's stated that a logic high is detected at 0.7* VCC (page 10). With only one VCC (=3V3?) available (pin 20), is it then possible combining I2C busses at both 1.8V, 3.3V and 5.0V with this device at one time? I think this is unclear from the datasheet. I would like to achive

I2C=1V8 I2C1=3V3 I2C2=1V8 I2C3=5V0 I2C4 not used

Is this possible with this device or would you recommend me doing something else?

Best regards and thanks in advance

Søren

Input Capacitance @ SN74LVC

Josef Warta — Fri, 25 Sep 2009 12:06:53 GMT

Hello,

do we have more characterization data on input capacitance of our SN74LVCxxx family?
According datasheet: input capacitance is 4 pF @3.3V and 25 degree.
Do we have data also for 2.5V and over a temp range from -40 to 85 degree Celsius?

Many Thanks
Josef
TI-AFA Germany

power logic 8-bit shift register

Tara — Thu, 24 Sep 2009 11:52:15 GMT

I'm looking for a direct replacement for p/n TPIC6B595N that woudl work with a 3.3v based system.

Line Level Conversion II

T Mather — Tue, 22 Sep 2009 18:49:34 GMT

I have two microcontrollers talking to each other via shifted UART, 3.3V <-> 5V . I have an old design that has a large number of parts for the line conversion I'm updating and I am trying to evaluate using the TXS01xx. I'm concerned that the microcontrollers don't have enough drive capability to overcome the bidirectional drive. Does anybody have any advice or experience on the matter?

How to control LED's with CD74HC595

indiantuktuk — Tue, 22 Sep 2009 05:33:16 GMT

Hi,

Could anybody guide me how to develop code to control the 16 LED's with HC595 shift register (2nos) and F2812?.

Thx

Hyperlynx problem with IBIS model for buffer sn74cb3q3245

polive — Tue, 08 Sep 2009 16:02:56 GMT

Hello,

I downloaded the IBIS model for buffer sn74cb3q3245 on TI website, but actually I cannot use it properly with the Hyperlynx simulation tool.

Indeed, no matter the pin I choose in the "attribute model" form (see picture), it's always defined as an input.

Did someone experience the same issue ? Any hint how I could fix that ?

Hyperlynx version : LineSim V8.0, build 433

Simulation done using the "free-form schematic" editor.

MPC506: Can I use +5V and -5V for Vsupply+ and Vsupply-?

PYTsai — Wed, 16 Sep 2009 03:34:07 GMT

Hi All,

1. Can I use +5V and -5V for Vsupply+ and Vsupply-?

2. if we use +5V/-5V for Vsupply+/Vsupply-:

a. what is the range of analog input signal?

b. Is logic level high still +4V?

Thanks!

PY Tsai

NE556 Propagation Delay

Pete Semig — Mon, 14 Sep 2009 14:47:16 GMT

Hello everyone,

I have a customer interested in using the NE556. He would like to know the propagation time of the device, however. He specified that 1us delay would be okay. Also, he's looking to supply 200mA of current. The datasheet is a little confusing in that the first page states that it can source/sink 150mA of current, while the recommended operating conditions state +/- 200mA. Please clarify.

Thanks,

Pete

Quadruple 2-Input Positive-NAND Buffers w/ Open-Collector Outputs (54S38)

Tenny Thomas — Fri, 21 Aug 2009 12:21:57 GMT

Hi,

What is the difference between SN54S38J and SNJ54S38J? Is the footprint of both the same?

Thanks in advance.