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OMAP3530 ISP: Writing CCDC Raw Output to memory.

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Marc Perron posted on 30 Oct 2009 11:52 AM

I'm trying to configure the ISP interface on our OMAP processor to write raw Bayer input to memory. However, I keep seeing an error that the CCDC won't become idle. I'm using the Linux ISP driver from the TI PSP, when I tell the driver to configure the ISP to write to memory, it sets the ISP_CTRL.RSZ_CLK_EN[12] bit to 1, enabling the resizer clock. However, the resizer should not be used in this case so it seems to me this bit should be set to zero. I was wondering if having the resizer clock enabled might be causing the CCDC to not be able to come out of the idle state. The test checks that one of the following conditions are true to determine if the CCDC is busy:

  • CCDC_PCR.BUSY[1] bit is asserted.
  • SBL_CCDC_WR_0.DATA_READY[21] bit is asserted.
  • SBL_CCDC_WR_1.DATA_READY[21] bit is asserted.
  • SBL_CCDC_WR_2.DATA_READY[21] bit is asserted.
  • SBL_CCDC_WR_3.DATA_READY[21] bit is asserted.

Is it possible that the OMAP will assert one of these bits if the Previewer clock is enabled, and it will not be cleared until some event occurs which never happens because the Previewer is disabled.

Also is there a better explanation of the meanings of the DATA_READY, and DATA_SENT bits. The TRM is pretty scant on details.

Thanks,

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The ISP_CTRL.RSZ_CLK_EN[12] bit is unset and I'm still seeing the same behaviour, so that pretty much rules out that theory.

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We've run into the same issue, and I don't know the solution to this.

If we use the preview (bayer to YUV) everything works fine, but if we use bayer->memory than we get the CCDC won't become idle.

Hopefully you'll have better luck resolving this issue than we've had.

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