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TSW1400 4GB DDR

Igor Kronos
Prodigy 160 points
Other Parts Discussed in Thread: AFE5818

Hello,

Can I replace the default 1GB DDR2 memory with 4 or 8 GB memory module to allow more samples to be stored?

Thanks.

  • 0
    TI__Genius 12965 points
    Igor,

    The larger DDR2 module pin out is routed to the FPGA, however I do not believe the existing DDR controller in the firmware is compile to handle the larger memory bank addressing. The HSDC Pro software is also not programmed to handle the larger memory.

    Ken.
  • 0 in reply to Ken C
    Prodigy 160 points
    Ken,
    Is it possible to get source code of HSDC Pro software, so I could try to modify it to get data from TSW1400 to PC faster?
  • 0 in reply to Igor Kronos
    TI__Genius 12965 points

    Igor,

    The data transfer speed limitation is the implementation of the USB interface from the TSW1400 to the PC.  This is implemented using a SPI type interface to transfer data from the FPGA memory to the PC through the USB SPI interface (slow).

    For a faster interface I would recommend designing new firmware for the FPGA to implement a faster/dedicated memory transfer using true USB 2.0 and software optimized for your purposes.  You can reuse the same TSW1400 and ADC EVM hardware.

    Ken.

  • 0 in reply to Ken C
    Prodigy 160 points

    Thanks Ken,

    So, I only need to implement my own firmware, the hardware shall allow the use of full speed USB2.0, right?

    Can you share the source code of your FPGA for TSW1400+AFE5818, please.

    Thanks.

  • 0 in reply to Igor Kronos
    TI__Genius 12965 points
    Igor,

    After reviewing the TSW1400 USB schematics closer, it looks like the USB2 interface was not implemented and as such it is limited to only the SPI interface for data transfer.

    It looks like it is not possible to implement any faster interface on the TSW1400.

    I apologize for the mis-information in my previous post.

    Ken