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PCM9211: I2S clock master/slave | routing to a source device

Part Number: PCM9211

Hello,

I have a question regarding I2S audio routing within a design around PCM9211.
The PCM is used as multiplexer here.
There is one output device (an I2S input class D amp) on the PCM's main output.
There are two input devices: one on the AUXIN0 port, another on the AUXIN1 port.

The output device is a I2S receiver in clock slave mode.
The input devices are I2S transmitters in clock master mode.
From the PCM9211's datasheet I understand this setup is ideal, right?

Now, the second source device, has also an I2S data input which I want to use. There are however no seperate clock lines for this input, the same as for it's output must be used.
My goal is to make a route possible for audio comming from source 1 to the source 2 device input.

Since the PCM has multiple outputs (AUXOUT), which can be independent from the main output, I was thinking to use the PCM MUX for this as well.
However: I read in it's datasheet AUXOUT can only operate in I2S clock master mode.
Problem: The source 2 device is already master...

Is there something I missed out and is there a way to use AUXOUT or another output to accomplish this audio route?
If no: what is the best alternative?

The PCM9211 is tremendously versatile, so I believe it's possible in some way, but I'm not sure.

Kind regards,

  • So, just to be clear:

    This (see diagram attached below), would be possible if the AUXOUT port could be an I2S clock slave.
    But, that's not possible, I THINK...

  • In reply to Julien Roels:

    Hi, Julien,

    As you mention, AUXOUT port can be used only as a clock Master, so the configuration you are mentioning cannot be implemented.

    Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • In reply to Diego Melendez:

    Hi Diego,

    Thank you for confirming.
    What possible alternative do you recommend? I was thinking about the following options:

    1) Using an SPDIF output from the PCM (MPO0 or MPO1), and connecting this to a DIR which converts to I2S and is able to operate as I2S clock slave at the same time.
    However... I think such a device doesn't exist? (I only know DIR IC's which are clock master untill now).

    2) Using some buffer device to split (duplicate) the DOUT-line from source 1 and feeding one output to the PCM and one output to source 2 (bypassing the PCM altogether).

    3) Tweaking source 2 to act as an I2S clock slave, and let be the AUXOUT port the clock master of both source 2 and AUXIN1. However, I don't know if such input-output loopback of clocklines is allowed for PCM9211.

    Because I think (1) is impossible, and (3) is too hard because I don't know how I can tweak source 2; I think option (2) is my best shot.
    So, for option (2): do you have a recommendation on which buffer device I should use to split the DOUT-line?
    Or is there a better alternative which I didn't think of?

    Thanks in advance!
    Kind regards

    -------------------

    EDIT 1: I just realized option (2) is also impossible because of both sources are I2S clock masters.

    Seems like my only options are (1) and (3)...
    I will investigate if option (3) is possible. Otherwise, do you have an idea for a DIR which can be I2S clock slave for (1)?

    -------------------

    EDIT 2: I just figured out tweaking of source 2 is impossible. Leaving only option (1).

    Another possible option is to tweak source 1 and let this be a clock slave, dictated by the clock lines of source 2.
    I think this might be possible (altough this will include many implications for this block).
    With this option (4) I will need the same device as I would need for (2): a buffer for the I2S dataline with two outputs to drive the PCM input and source 2 input from one output.


    Thanks in advance,
    Kind regards

  • In reply to Julien Roels:

    Hi, Julien,

    Probably the best option is to configure either Source 1 or 2 as I²S slave device an setup the other one as the master for the whole subsystem:

    For the buffer, we have several options in TI portfolio, we used in the past a CDCLVC1102 device for a similar application. You might also ask in Clock and Timing forum for a more specialized recommendation.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • In reply to Diego Melendez:

    Hi Diego,

    Thank you for your answer, I understand that's the most valid and straightforward solution.

    However: converting one of my sources to a clock slave is very hard, and has some undesirable side effects. Therefore I was thinking about one more possible solution: using an asynchronous sample rate converter (ASRC) between the sources.
    I was thinking about the TI device: SRC4192, since both input- and output port can be I2S slave here!

    What do you think about that idea?

    Kind regards,
  • In reply to Julien Roels:

    Hi, Julien,

    I think that might work well. Adding the SRC between the sources will allow you to send the data from Source 1 to Source 2 being both devices a master for their bus. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer