This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS 5630 KDR fails

Hello. I have many TAS5630KDR that fail.

I have more than 10% failure in my design with the TAS5630KDR. The SD Pin goes high and I have short form the output pin "OUT_A" and "OUT_C" to ground.

I was suspecting some over Voltage spikes in the output and made some measurements of the outputs. In the ZIP file below you'll find the design and information to my measurements.

The overvoltage spikes of +/- 15V you'll find in the DSO printouts occur only in the first one or 2 seconds of pin "REST" going high or pin "RESET" going low with audio signal applied to the inputs A + B. with out audio signal the voltage spikes are not occurring. The spikes are independent of the load (3 or 6 Ohm or no load).

I notices also that the spikes occur when the  "OUT_A" is still high and the "OUT_D" rises high. I don't understand why "OUT_D" rises while "OUT_A" is still high. I believe these two outputs should not be high at the same time.

The voltage over all "PVDD" pins was during the measurements "clean". There was no voltage overshoots.

I made the measurements with 48VDC. In actual the Voltage can rise up to 54.6VDC. this is the charging voltage for the PB batteries.

I hope this problem can be solved soon. Because there are about 150 amps out in the field and so many are coming back defective.

Greets Dani

  • Hi, Dani,

    Sorry that you are having difficulties.

    I think you are looking along the right path.

    We have an app note that describes voltage measurements: www.ti.com/.../slea025a.pdf

    You might also want to compare your layout against the EVM layout. The critical portion is the high power supply pins and ground. You want that loop to be minimized and well decoupled with ceramic caps to minimize overshoot.

    -d2
  • Hi, Don

    First thanks to your reply and sorry for my late reaction. I was extremely busy for the past days.

    I made the layout according to the EVM board. And there where no overshoots when I measured according to the mentioned app note.

    What really bathers me is the overshoots I measured on the output pins and the fact that the overshoot occurs when the "OUT_A" (yellow) is high and the "OUT_D" (blue) rises high (full bridge mode). I believe the "OUT_D" should not go high as long as "OUT_A" is still high. This happened only during the first moment when I "on" and "off" the amp (reset pin) whit signal already applied.

    Note: The probe on "OUT_D" (blue) was without ground spring. 

    Many of the measurements where made with a modified probe but I compared with measurements with a probe with "Ground Spring" (experience from older projects). The results where exact the same waveforms.

    Many information to my measurements are also found in the attached zip file of my first post.

  • Hi Daniel,

    Sorry for my late reply. I'm working on it. Please give me some time. Thanks for your understanding.
    Regards,
    Will