This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS5538/TAS5624A Noise and DC Offset Issues

Other Parts Discussed in Thread: TAS5538, TAS5624A, TAS5548

Hi,

Could you please tell us the mechanism for increasing the noise and dc offset voltage in detail although we know that they depend on the noise shaper and the interchannel delay setting ?

TAS5538_TAS5624A_Nosie_and_DC_Offset_Issues.pdf

Best regards,
Kato

  • Hi Kato-san,

    I'm not sure I understand your request. Can you provide more details on what you're trying to accomplish or what issue you're trying to solve?

  • Hi Damian-san,

    Thank you for your response.

    I believe that there are the methods to improve the output noise and the dc offset voltage as below.

    - Optimizing the 8 interchannel channel delay register
    - Applying to enable the DAP auto mute since TAS5538 does not have the register to disable the noise shaper on the auto mute
    - Replacing TAS5538 with TAS5548/58

    What I would like to know is the mechanism(or the principle) for increasing or decreasing the output noise and the dc offset voltage depending on the pwm modulation methods, the 8 interchannel channel delay settings and having the shut-down channel or not(e.g. channel1 : the normal mode, channel2 : the shut-down mode).
    I think that this issue can be reproduced by simulating it.
    So, why are the output noise and the dc offset voltage affected by those settings ?
    Could you please tell me this reason in detail ?

    Best regards,
    Kato

  • Hi Damian-san,

    Please see the attached file since I evaluated TAS5538 and TAS5624A on the evm.
    The output noise and dc offset voltage depends on having the shut-down channel or not.
    So, why are the output noise and the dc offset voltage affected ?
    Could you please tell me this reason in detail since we immediately need to inform our customer of it ?

    TAS5538_TAS5624A_Nosie_and_DC_Offset_Issues_for_Shut-down_Channel.pdf

    Best regards,
    Kato

  • Hi Damian-san,

    Could you please let me know if you have any updates on our questions ?

    Best regards,
    Kato

  • Hello Kato-san,

    I don't have any updates. Let me schedule to look into your post this week and get back to you. Sorry for the delay. I hope it's not causing trouble with the customer.

  • Hi Damian-san,

    Thank you for your strong support.
    I am looking forward to getting your comments during this week.

    Best regards,
    Kato

  • Hi Kato-san,

    I've looked at your measurements and below are my comments:

    1. The purpose is to find ways to improve the noise and offset, right? Is there a particular problem with the noise and offset of TAS5624A?
    2. How are you measuring offset? Difference in PWM duty cycle times PVDD? Just with voltmeter at the output across the load? try both to check for correlation.
    3. Based on your measurements, it appears that some of the noise is from the power supply due to the switching of the class-D
      1. BD has higher noise than AD in BTL since both OUTA/C and OUTB/D has longer periods where they are both switched to PVDD or ground
      2. Shutting down the channel didn't drastically reduce the noise. What is the noise when both channels are shutdown?
    4. Dither ON means noise shaper or AP dither from the digital signal generator? or both? What is dither OFF?
    5. Playing around with the interchannel delays (ICD) aren't recommended. It will hurt performance more than help, as you observed.
    6. Offset is the mismatch between the duty cycles of the BTL outputs. This is inherent to the device and there isn't any knobs from a software perspective you can tweak to reduce it. This will require trimming. ICD isn't a good approach, since it can impact several parameters as THD+N, Noise, PSRR, etc.  You may solve one problem, but create another.

  • Hi Damian-san,

    Thank you for your strong support.

    See my comments below:

    1.The purpose is to find ways to improve the noise and offset, right? Is there a particular problem with the noise and  offset of TAS5624A?

    ---> We focus on the offset voltage issue since it may cause a pop noise.

    2.How are you measuring offset? Difference in PWM duty cycle times PVDD? Just with voltmeter at the output across the load? try both to check for correlation.

    ---> The offset voltage is measured at the output across the resistor load by using the digital multi-meter.
         We have not measured the pwm duty cycle time since using the dithering on the modulator.

    3.Based on your measurements, it appears that some of the noise is from the power supply due to the switching of the class-D
    a.BD has higher noise than AD in BTL since both OUTA/C and OUTB/D has longer periods where they are both switched to PVDD or ground

    ---> The pwm output pulse doesn't switch at the same time for the BD mode since TAS5534/38/48/58 can adjust the output phase for each OUTA/B/C/D.
         On the other hand, the pwm output pulse(the pairs of OUTA/B and OUTC/D) switch at the same time for the AD mode.
         Therefore, the AD mode has higher noise than the BD mode.
         Is my understanding incorrect ?

    b.Shutting down the channel didn't drastically reduce the noise. What is the noise when both channels are shutdown?

    ---> We focus on the offset voltage for the shutdown mode.
         The output offset voltage is changed when one channel(OUTA/B or OUTC/D) is shut down on the TAS5624A evm.
         Could you please let us know the the mechanism of the phenomenon ?
         In addition, could you please give us your advice since we believe that it is related to the following post ?

         https://e2e.ti.com/support/amplifiers/audio_amplifiers/f/6/t/517470

    4.Dither ON means noise shaper or AP dither from the digital signal generator? or both? What is dither OFF?

    ---> It is the noise shaper function which the pwm modulator(TAS5534/38/48/58) has.
         As you know, the dither OFF means that the noise shaper only can disable on the auto mute by using the 0xCC register on the TAS5548/58.
         However, TAS5534/38 doesn't have that function.

    5.Playing around with the interchannel delays (ICD) aren't recommended. It will hurt performance more than help, as you observed.

    ---> As you know, the output offset voltage and output noise should be decreased although you said that the interchannel delays (ICD) aren't recommended.
         Of course, we believe that there are other trade-offs.

    6.Offset is the mismatch between the duty cycles of the BTL outputs. This is inherent to the device and there isn't any knobs from a software perspective you can tweak to reduce it. This will require trimming. ICD isn't a good approach, since it can impact several parameters as THD+N, Noise, PSRR, etc.  You may solve one problem, but create another.

    ---> I understood that the output offset voltage is the mismatch between the duty cycles of the BTL outputs.
         Could you please tell us the circuit topology of the dc servo on the TAS5624A which I mentioned above 3. b. ?

    Best regards,
    Kato

  • Hi Damian-san,

    See my comments below:

    3.Based on your measurements, it appears that some of the noise is from the power supply due to the switching of the class-D
    a.BD has higher noise than AD in BTL since both OUTA/C and OUTB/D has longer periods where they are both switched to PVDD or ground

    ---> I understood that the common-mode noise(the DC offset voltage) with BD mode is higher more than one with AD mode during muting since each phase of the pwm outputs is different with BD mode.


    By the way, could you please let me know if you have any updates on our questions ?

    Best regards,
    Kato