Hi,
We have successfully configured our amplifier to use with a 4-wires configuration, however we are having some difficulties with 3-wires (no MCLK). The clocks we have now are LRCLK = 48 kHz and SCLK=3.072 MHz and we are using this script:
#!/bin/bash #Go to Page 0 i2cset -f -y 1 0x4E 0 0 #Reset registers i2cset -f -y 1 0x4E 1 1 #Standby request i2cset -f -y 1 0x4E 2 0x10 #Ignore MCLK detection, Ignore MCLK halt detection i2cset -f -y 1 0x4E 37 0x18 #PLL clock source => BCLK i2cset -f -y 1 0x4E 13 0x10 #Standby release i2cset -f -y 1 0x4E 2 0
We have noticed that if we execute the scipt, connect a MCLK and then remove it, the sound comes out. If we don't connect it, we never get to hear any sound. We thought that this may be related to Power-on-Reset, since the datasheet says that "the device holds sets all of the internal registers to their default values and holds them there until it receives valid MCLK, SCLK, and LRCK/FS toggling for a period of approximately 4 ms" (i.e. all the clocks are needed during 4 ms). Could anyone help us?
Best regards,
Xabi.
