This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS5760M PBTL Hardware and Software setup (Register 8 - Error 0x08)

Other Parts Discussed in Thread: TAS5760M, TAS5760XXEVM

Hi,

We developed a board using TAS5760M designed in PBTL mode MONO ,software control, working with the 32-Pin DAP package.

Unfortunately we get an error response on the I2C channel on Fault Configuration and Error Status Register, which is 0x08 (CLKE bit is toggled) .

This happens during initialization and also during playback.

We searched the entire datasheet, but we did not found any information about the I2S bus configuration in order to work in PBTL MONO software control mode, for example we can't resolve the following issue:

1. Is it neccecarry to configure the I2S bus from microcontroller side in mono channel (Left or Right) or just send Stereo (Left and Right) and the TAS automatically reconfigured to one channel?

2. Which is the recommended I2S format?

Also please check the attached images of the ".brd" and ".sch" of our PCB and mention if any problem occurs from wrong in its design.

Thanks in advance,

Intelco Team 

  • Hi, Marios,

    The Clock error is reported whether an incompatible clock ratio is used or the clocks are stopped. Can you please let me know the I²S clock frequencies you are using so we can verify that they are compatible with the TAS5760M?. The serial audio data sent to the amplifier should match with the format configured in Register 0x02.

    About the PBTL configuration, in Software control mode, the PBTL operation is determined by Bit 6 of Register 0x06. The channel used as the source for the PBTL channel is selected with Register 0x06, Bit 1. As long as the I²S clocks provided are correct, the amplifier can be configured to either stream Left channel or right channel in PBTL mode. 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi, Diego,

    Lets start with the I2S bus configuration, which is the following:

    format.bitWidth = kSAI_WordWidth16bits;
    format.channel = 0U;
    format.sampleRate_Hz = kSAI_SampleRate44100Hz;
    format.masterClockHz = OVER_SAMPLE_RATE * format.sampleRate_Hz;     //OVER_SAMPLE_RATE = 128
    format.protocol = config.protocol;                                                                      //kSAI_BusLeftJustified
    format.stereo = kSAI_Stereo;

    So now as for the Format of the I2S bus, we have set it to Stereo mode in that way the microcontroller send out both of the channels. We did this, while we were reading that we can select the Right or the Left channel on the TAS while working in the PBTL mode. So, from the above we can understand that it is not necessary to send only the one channel to TAS. Although we have also try to change all the above I2S configuration, between different combinations, but nothing worked at all.

    In this step let me inform you that we are able to monitor the final signals timing diagrams that TAS is receiving with a Logic Analyzer (sniffing method) attached on the signals. Also let me tell you that while we believe in TAS5760, we have bought the TAS5760xxEVM which work perfectly with our microcontroller, but in BTL mode, and thats why we make our pcb based on the TAS. So we have to solve the problem.

    As for the software configuration of the TAS, we have configure the following:

    uint8_t temp=0;
    SPK_SD(0);
    TAS5760_Reg_WR(tas_Power_Control,0xFC);
    TAS5760_Reg_WR(tas_Digital_Control,0x05);                              
    TAS5760_Reg_WR(tas_Analog_Control,0xf1);                              //PBTL_CH_sel=0= Right
    TAS5760_Reg_WR(tas_Volume_Control_Conf,0x80);
    TAS5760_Reg_WR(tas_LCH_Volume,0x90);
    TAS5760_Reg_WR(tas_RCH_Volume,0x90);;
    TAS5760_Reg_WR(tas_Power_Control,0xFD);
    TAS5760_Reg_RD(tas_FaultControl,&temp);
    SPK_SD(1);

    Please let me know if you need any extra information of the setup.

    Hope we are going solve the problem.

    Best Regards,

    Intelco Team

  • Hi, Marios,

    Thanks for the information. The configuration of the amplifier seems correct. For the I²S format, It seems correct, but I would like to ask if you can send me the plots of the signals provided in your system so I can verify that they are compliant with the clocks expected by the amplifier. If the I²S signals were tested before in the EVM, maybe something in the PCB of your system is not correct. 

    Thanks and Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi, Diego,

    I attached a screenshot of the I2S timings diagram that i monitor through a logic analyzer. Let me tell you that is the second time I have this problem,
    on 32-DAP package. You can check here (https://e2e.ti.com/support/amplifiers/audio_amplifiers/f/6/t/523152) our last post on the same problem that also not solved.

    +MCLK 5,66MHz

    Unfortunately, I am skeptic especially about 32-DAP package (mayby don not work at all) because I use exactly the same timing diagram to the 48-pin package exist on the EVB and works perfectly. 

    Best Regards,

    Intelco Team

  • Hi, Marios,

    Thanks for the feedback. I tested the EVM and provided same MCLK, LRCLK and BCLK from your timing diagram and the amplifier is shutting down while reporting a clock error. Can you please let me know the exact setup you used when testing the EVM? where did you connect the I²S signals?. Probably the amplifier is not accepting the BCLK/LRCK ratio. Do you have a different I²S source available to connect to the board just to discard any problem with your actual I²S interface? 

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hi, Diego,

    Seems that something goes wrong with your EVB, while I run again my EVB based demo and the result as for the I2S timing diagram it was exactly the same. Please find attached bellow.

    +MCLK =5,66Mhz

    Also the I2S signal must be right. I use exactly the same I2S channel on the microcontroller without change a piece.

    Let me tell you that my new project is a Copy from this based on the EVB, so it is difficult to occurs some problem on the I2S signals.

    Can you please check twice the routing on the PCB I send you some days before?

    Also do you have any EVB that use the PBTL mode of the TAS5760 OR any example on the internet community, from somebody who succeed work the 32-DAP package TAS5760 in PBTL mode ever?

    Finally please confirm that there is no something we have to change, especially when we use the 32-DAP package in order to work.Let me remind you that we have make our PCB according your Manual which has some misunderstanding and wrong topics as I had mentioned on the other Forum topic
    (https://e2e.ti.com/support/amplifiers/audio_amplifiers/f/6/t/545380)

    Best Regards, 

    Intelco Team

  • Hi, Diego,

    Finally I make it WORK this morning!!

    Actually my whole configuration was right and exactly same as the demo one that I had connected to the EVB.

    Luckily the problem wasn't occurred neither of the Hardware PBTL configuration nor Software setup, BUT I had  a very Critical Circuit problem on the pin of the SCLK which I fix.

    The logic analyzer was monitoring the same timing diagram but the TAS was returning Clock Error because of a short connection on the printed circuit on the BCLK pin.

    I would like really to thank you for your interest that you show at the problem with quick and helpful information. Also please accept my sorry for spending your time in a problem that I had to solve alone with double checking of the PCB.

    Just for the typical let me mention to the Forum that the TAS5760M 32-DAP package, finally worked perfectly from the start and the problem occurred from my side .

    Best Regards,

    Intelco Team 

     

  • Hi, Marios,

    Thanks for your feedback!, we are glad to hear your issue was resolved. There is no need to apologize, we are here to help!.

    Please let me know if you have further questions.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer