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TAS5760M Minimum Pulse Width for SPK_SLEEP/ADR in Hardware Control Mode

Sadanori Kato
Guru 36490 points
Other Parts Discussed in Thread: TAS5760M

Hi,

Could you please tell us the minimum pulse width for SPK_SLEEP/ADR in the hardware control mode with PBTL configuration ?
How does TAS5760M work if the pulse width for SPK_SLEEP/ADR is very narrow ?

Best regards,
Kato

  • 0
    TI__Guru 57800 points

    Hi, Kato-san

    I will look for this information and will get back to you once I get any update

    Best Regards,

     -Diego Meléndez López

      Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Guru 36490 points

    Hi Diego-san,

    Thank you for your quick response.
    I am looking forward to getting the information from you.

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    TI__Guru 57800 points

    Hi, Kato-san,

    The /SPK_SLEEP/ADR pin should be held at logic '0' until the output of the amplifier gets into High impedance state. In the default configuration, the pulse should last about 10ms to ensure the outputs are correctly set into High impedance.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Guru 36490 points

    Hi Diego-san,

    Thank you for your response.
    How does TAS5760M work if the pulse width for SPK_SLEEP/ADR is less than 10ms ?

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    TI__Guru 57800 points

    Hi, Kato-san,

    The amplifier's  outputs will not be fully set into High impedance state, returning to normal operation without entering "sleep" mode.

     Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Guru 36490 points

    Hi Diego-san,

    Thank you for explaining so politely.
    I have an additional question.
    So, how does TAS5760M work if applying the 200Hz pulse to SPK_SLEEP/ADR and repeating the sleeping / unsleeping sequence in PBTL hardware configuration ?
    Does the phase difference between SPK_OUTA+(SPK_OUTB+) and SPK_OUTA-(SPK_OUTB-) change if applying an above condition to TAS5760M ?

    Best regards,
    Kato

  • 0 in reply to Sadanori Kato
    TI__Guru 57800 points

    Hi, Kato-san,

    Can you please explain why a 200Hz pulse is used in /SPK_SLEEP/ADR?, The phase of the outputs should not be affected by enter/exit sleep mode.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • 0 in reply to Diego Melendez
    Guru 36490 points

    Hi Diego-san,

    Thank you for your reply.

    TAS5760M detected the thermal protection(the overcurrent protection) in rare cases if repeating the random power-on/off sequence with the PBTL hardware configuration.
    Then, this issue doesn't occur in the BTL configuration for the same device.
    We haven't found out the root cause yet.
    So, we guess that the pair of "SPK_OUTA+ and SPK_OUTA-" or "SPK_OUTB+ and SPK_OUTB-" is shorted in rare cases since this issue occurs even if TAS5760M doesn't have the output load.
    Have you ever experienced such a phenomenon ?

    Best regards,
    Kato