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TAS5613
Related Posts

  • Wiki Page: TAS5342 Question from Customer

    Andres Blanco
    Q: TAS5342 Question from Customer Customer needs to have the TAS5342 part interfaced with a analog PWM - Is there an Analog PWM that can drive this part? A: Re: TAS5342 Question from Customer Hi, The TAS3308 has analog inputs that go to an integrated ADC. An analog input Class D might be...
    on Jun 17, 2010

  • Wiki Page: Quick Reference guide to Max output power of a Class D amplifier

    Andres Blanco
    Q: Quick Reference guide to Max output power of a Class D amplifier Can you comment on a Class D's max output power for a given power supply and load? A: Re: TAS5613 - max output power from 24V to 4ohm load? Hi, The pdf file attached at the end of this post shows how to approximate...
    on Jun 21, 2010

  • Forum Post: Re: TAS56xx single ended mode and hook up

    SteveCrump
    Bruce, use the source ground as one side of each differential input to TAS5613. Connect each differential input between source ground and source Left or Right output. Remember, though, that during turn-on you will have to delay enabling TAS5613 until your single ended source output has stabilized, or...
    on Jun 23, 2010

  • Forum Post: Re: BD mode vs AD mode

    SteveCrump
    Bruce, it is possible to operate TAS5613 in AD or BD mode: 000 and 010 are (2xBTL, AD and BD). PBTL also can use AD or BD. These are described in the table MODE SELECTION PINS on page 3 of the data sheet. I imagine you have already read this section. BD is the preferred mode, so the EVM does not provide...
    on Jun 23, 2010

  • Forum Post: Re: Clock for TAS5613

    SteveCrump
    Chairanya, it is not necessary to add a crystal or external clock, only a resistor at the FREQ_ADJ pin. It is also possible to use an external clock. This is explained on page 21 of data sheet SLAS711, under OSCILLATOR. TAS5613 includes a master clock oscillator, and its frequency can be trimmed with...
    on Jul 6, 2010

  • Wiki Page: Clock for TAS5613

    SteveCrump
    Generally the switching frequency for analog-input devices in TI's TAS56xx family ( TAS5611 , TAS5613 , TAS5615 , TAS5630 ) is controlled by a single resistor. It is also possible to use an external clock. Each device includes a master clock oscillator, and its frequency can be trimmed with a...
    on Jul 13, 2010

  • Wiki Page: TAS5613 THD+N performance @ 10KHz

    Andres Blanco
    Q: TAS5613 THD+N performance @ 10KHz Is there any data on the THD+N performance vs power at 10Khz for the TAS5613? (4R/BTL/36V - Same test conditions as the 1st page graph on the data sheet) Can you overlay the 1kHz and 10kHz data on the same graph? Q: Re: TAS5613 THD+N performance @ 10KHz...
    on Jul 28, 2010

  • Forum Post: Re: TAS5613 single ended vs differential

    SteveCrump
    Bruce, all that should matter is the signal difference between the inputs to TAS5613. Of course, if the difference in our EVM is higher than the difference on your board the output of TAS5613 will be higher in the EVM. The EVM includes a preamp with gain of about 7dB (10k/4.4k), and it amplifies the...
    on Aug 27, 2010

  • Forum Post: Re: !CLIP always active

    SteveCrump
    Bruce, can you compare the EVM to your circuit point by point (DC voltages, AC waveforms, etc)? I think that could point to the answer. Those are the data I would use to try to identify the problem. Also, please make sure your components are equivalent to those in the EVM. For example, please make...
    on Sep 27, 2010

  • Forum Post: TAS5613 max temperature

    Pierre Watts
    Hi, I've earmarked the TAS5613 in stereo BTL mode for an aviation project. The only problem is that the qualification requirements includes operation at 85degrees Celsius ambient, while the TAS5613 is only rated to 70degrees. However, the output power condition for the 85degrees test may be...
    on Nov 16, 2010

  • Forum Post: Re: TAS5613 max temperature

    SteveCrump
    Pierre, the data sheet rating is for the EVM, which is not expected to be operated above 70C. The device will operate nicely at higher ambient temperatures with low enough thermal impedance to ambient. The real limitation is junction temperature. I recommend a target of 125 to 130 C worst case to...
    on Nov 16, 2010

  • Forum Post: Ready, Clip open drain

    Bruce52209
    For the TAS5630, 5613, 5611.... Are the READY and CLIP output characteristics the same as the SD and OTW characteristics? That is 26K pull up to 3.3V?
    on Nov 19, 2010

  • Forum Post: TAS5613 PVDD capacitance limit

    Pierre Watts
    Hi, I'm designing 3x TAS5613 in a 6-channel application, powered with a 500W DC-DC half-brick supply (Synqor IQ24 series). Trouble is, the supply has a maximum stable load capacitance limit of 1000uF, and with the design guideline recommending 1000uF per half-bridge output I need 12,000uF total...
    on Dec 9, 2010

  • Forum Post: Re: TAS5613 PVDD capacitance limit

    SteveCrump
    Pierre, of course reducing the bulk capacitance (the 1000uF per channel) can result in higher power supply ripple and distortion at moderate to full output power. But if you are confident in your power supply, and you can sense very close to the 3 TAS5613, you may be able to make this work with performance...
    on Dec 9, 2010

  • Forum Post: Re: TAS5613 PVDD capacitance limit

    Pierre Watts
    Hi Steve, Thanks for the detailed reply. Would you rather recommend using 6x 150uF instead of 12x 82uF? I know there are a huge amount of variables, but if the target 70W/ch @ 6ohm is likely to exceed 1% THD I'll have to find a different solution.. Regards, Pierre
    on Dec 9, 2010

  • Forum Post: Re: TAS5613 PVDD capacitance limit

    SteveCrump
    Pierre, your math is better. I think you want to use 4 x 82uF per TAS5613, replacing the 4 x 1000uF normally used. You will also want to use power supply voltage of 36V. I think you can try this and see if it achieves your target. I believe there is a good chance it will. Regards, Steve.
    on Dec 9, 2010

  • Forum Post: Re: TAS5613 PVDD capacitance limit

    Pierre Watts
    Hi Steve, Thanks I'll give it a try - however I can't use 4x 150uF per chip as there are 3x chips for 6 channels. That is why the 4x 1000uF has to come down to 4x 82uF per TAS5613, since 12x82 = 984uF. Regards, Pierre
    on Dec 9, 2010

  • Forum Post: TAS5613 Inductor choice

    Andrea Campanozzi
    Hi All, We're designing a power output stage with the TAS5613. We've built a prototype board basing on the schematics of the TAS5613 evaluation board but i cannot find the toroidal inductor (toko C3B-A0336). We tried replacing with http://docs-europe.electrocomponents.com/webdocs/002b/0900766b8002b270...
    on Jan 5, 2011

  • Forum Post: Re: TAS5613 Inductor choice

    SteveCrump
    Andrea, your MODE setting 010 selects BD modulation at the outputs. With BD modulation , when the input signal is zero the outputs switch almost in parallel, with small phase differences that produce narrow alternating differences between the 2 outputs. These enable the feedback system to maintain the...
    on Jan 5, 2011

  • Forum Post: TAS5630 - volume control

    Calum Mackinnon
    Hi, The design objective is to achieve an audio level of 25VAC for as many speakers as the circuit can safely handle. The environment for the amplifier would be a closed box without the ability to bring in cooler air. A speaker would typically have an autotransformer on the front end, allowing you...
    on Jul 2, 2011

  • Forum Post: how long should pin /reset be kept when power-on TAS5611?

    Xiaoka Xu
    Hi, I designed a power amplifier using TAS5611, and used another DSP to control it. It is recommended to hold pin /reset low in document. In our design, we need to turn on/off the PA frequently, so how long should pin \reset be kept when power on TAS5611? Or, how long do TAS5611 need to powr-up? Thanks
    on Jul 14, 2011

  • Forum Post: Re: how long should pin /reset be kept when power-on TAS5611?

    Xiaoka Xu
    Hi Don, Thanks for you reply. I followed this start-up procedure. The issue is that how long it will take between step(2) Apply VDD,GVDD and PVDD and step (3) Release /RESET. We used the DSP to control this start-procedure, so we need to set all of the time period in DSP board. Your help is appreciated...
    on Jul 16, 2011

  • Forum Post: Re: shutting down half of TAS5613

    Anthony Smith
    The application is a battery backed amplifier for emergency use, I dont want to switch between dual BTL and PBTL; I want to lay the board for PBTL only, and omit the filter components on C+D when we want the low power solution; As it is battery powered, I wanted the lowest idle power, and the option...
    on Oct 9, 2011

  • Forum Post: Re: shutting down half of TAS5613

    Anthony Smith
    Load for model A is 50W RMS, Load for model B is 100W RMS supply between 28V and 22V Both loads are through 100V line step up transformers, primaries are 12VRMS. The transformers are DC protected using 2200u caps bypassed by 10R resistors to prevent large currents on clipping. Mode is BD, but...
    on Oct 9, 2011

  • Forum Post: Re: shutting down half of TAS5613

    Anthony Smith
    Thanks for that, I think on rev 1 I may risk a device and try not fitting filter or bst caps; I have also added 0R links near device to isolate tracks should I need to add BST caps. According to spec, when switching each 1/2 bridge consumes 10mA gate drive and 12.5mA into filter- this is quite a lot...
    on Oct 12, 2011

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