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TRANSIENT ROBUSTNESS of INA199A1

Shinichi Inoue
Guru 19701 points

Dear Specialist

My customer is using INA199A1 for customer's product.

He is facing a problem of latch-up due to the ESD.

So he has a question about transient specification.

Could you please advise him?

(1)According to the datasheet P.16(IMPROVING TRANSIENT ROBUSTNESS), 

Applications involving large input transients with excessive dV/dt above 2kV per microsecond present at the
device input pins may cause damage to the internal ESD structures on version A devices.

Whether latch-up or not, which is depended on the device.

How is the individual specify and the variation?

Could you tell the percentage, if possible.(for example +/-20%, etc.) 

He must explain to end user.

He knows INA199B1 but he couldn't change because it has already been in production.

Best regards,

Shinichi

  • 0
    TI__Intellectual 2480 points

    Hello Shinichi,

    Are you saying that there is no interest in fixing the problem (by switching to INA199B1 or adding protection circuitry as shown on P.16 of the INA199A1 data sheet or in the Transient Robustness TI Design)?

    To further clarify, are you asking what is the safety margin on the maximum input transient dV/dt for the INA199A1?

    Are there currently any ESD protection circuitry in place? 

    Could you share a schematic of the device which shows any attached protection circuitry as well as Supply Voltage, Common Mode Voltage, and Max Load Current, and Shunt Size?

    Out of curiosity, what's the end application?

    Best regards,

    Kareem Moulana