INA240: How can inline CMM drop across shunt ever rise to 80v +/- inputs limit if VS is completely isolated from input CMM?

Hi Jason,

Jason Bridgmon said:

The abs max for the INA240 for common mode voltage is 90V.

Have to wonder how common mode is an issue if the front end is powered separately other than sharing ground. It seems to me the drop across the shunt is subtracted from phase B+ or added to GND during any given bipolar switch time since the inline phase floats near mid supply in trapezoidal wave forms. An Idle mode phase has about 10v leakage to ground even at 190v yet 0v leakage across any two phases in a Delta or WYE.

Jason Bridgmon said:

Am I understanding correctly that the flyback is present with the INA240 but not the INA282? 

The INA240 makes it clear a some sort of PWM flyback voltage across shunt was/is plaguing the current monitor ADC system. The INA240 signal output is more defined and strips out most the low level pulses cross talk occurring from the copartner phase and present on all the IAN282 captures.

The INA240 scope shows a single set of flyback PWM pulses moving back and forth across the ratio metric liner current rises. So when pulses leave one rise the one it left looks really clean and flyback burst is bopping all over from peak to peak in no specific order.  I doubled high side B+ electrolytic (470uf to 940uf) and that cut high side +24vdc flyback PWM (+/-4v) peaks in half but did very little for the low side they infect.

Jason Bridgmon said:

Am I understanding correctly that the flyback is present with the INA240 but not the INA282?

Hi Jason,

Fairchild forum post calls flyback pulses, FET switch node spikes. Did some more testing to determine if something in software was causing PWM spikes and shortened dead time but nothing stopped these spikes so far. Also added 1nf cap across VIN+/- and twisted with ground the signal pair cables out of each INA240 shunt PCB. 

The inverter high side +24-160vdc have expensive snubber capacitors, poly pulse cap 0.22uf parallel and 470uf @1.9amp ripple current. So these spike pulses seem quite normal. Slowing down the high side FET is not an option as switching is already fairly slow at 12.5Khz PWM, efficiency loss results. Think ON Semi link is more relative to 100Khz or above PWM.

Oddly when I zoom in on scope horizontal time base these PWM spikes 240 output are part of current measure in each FET on time, show as ringing pulses.

FYI: https://community.fairchildsemi.com/thread/1032

0.22uf Poly snubber:

/cfs-file/__key/communityserver-discussions-components-files/14/2772.Capacitpr-CDE-600v-snubber-pulse-metal-film-940C.pdf

High quality 470uf electrolytic:

/cfs-file/__key/communityserver-discussions-components-files/14/0638.Capacitor-electrolytic-Nichicon-CY_2D00_CL-series.pdf

Hi Jason,

Jason Bridgmon said:

I've been looking at your scope captures on the other thread and there are certainly dips present in the output, but I'm not sure what is causing them

Now have reference inputs configured REF/2 and we get +1.65v INA240 output level same resistive divider now sets 690mv signal ADC floor versus 0v. The 240 output signal should indicate symmetrical +/- current directions and the load is reflective of the low side +IN CMM facing supply and -IN CMM facing ground.

All seems fine with reverse current measures (GND to B+) yet what appears to be forward current is not being measured in monotonic voltage ramp like the reverse current. Some engineers seem to call that behavior a linear ratio metric output level. Otherwise the INA240 has not identified the direction of current flow across the shunt in the datasheet as being either reverse or forward and both directions do technically exist.

Perhaps forward current is not always a concern in low side monitors as it seems to originate in FET body diodes snubbing inductive kick back to ground or B+ respectively. Or it is reverse current regenerative in nature, the motor acting as a generator producing it's own current directed back to battery. Either way TI motor driver engineers claim similar low side circuits can measure +/- current in the full shunt voltage scale. Source DRV8305 current sense amplifiers section 8.2.2.4 and sense circuit illustration Figure 12.  

Is there some reason why 240 bidirectional mode produces a monotonic voltage ramp in one current direction and not the other? Or is INA240 thus missing that AC ratio current information when not being inline phase monitor?

Scope RF1&3 are INA282 low side 18m shunt: Both 1/2 cycles current flow are measured when 282 was configured REF/2. INN faces GND and INP faces the load, Reversing shunt polarity reverses the output signal.