Hi,
I would like to know behavior of non-inverting circuit by LMV358-N or TLV2442.
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Hi,
I would like to know behavior of non-inverting circuit by LMV358-N or TLV2442.
Yoshida-san,
Driving the inverting input with an ever-higher input current causes the op-amp output, Vout, to move more and more negative. Vout will eventually hit the the lowest output level, Vol, that it can achieve for the current being forced through it. The output transistor saturates and the amplifier is no longer operating in linear mode.
Since Vol cannot go any lower the voltage drop across the feedback resistor increases causing the inverting input to become higher and more positive. Eventually, the positive common-mode voltage range (Vicr) is exceeded. That upper limit is about (VDD) - 1.3 V for the TLV2442. When that happens and if driven hard enough, the output may invert. Inversion happens when the input stage FET drains are no longer out of phase with input gate signal. Instead the drains track the input gates and the output inverts.
The parameter that you really have to watch and not exceed is the Absolute Maximum Input Current, which is 5 mA for the TLV2442. If the current exceeds that limit there is the risk of damaging the input ESD cells, and/or the amplifier input circuitry itself. The absolute maximum specifications for voltage, or current, should never be exceeded.
Regards, Thomas
PA - Linear Applications Engineering