I am trying to access the PGA309 using the open source bus pirate, see http://dangerousprototypes.com/docs/Bus_Pirate.
The situation is as follow:
- Vsa is connected to +3V
- Vsd is connected to +3V
- GNDa connected to ground
- GNDd connected to ground
- TEST pin (9) is via 10kOhm connected to +3V
- SDA has a 10k pullup to +3V
- CLK has a pullup to +3V
The rest of the pins are not connected!
according to the sbou024a section 3.5 power on states that Gain and Zero DAC do have an initial value of 0x4000
The problem is that after a power up a read of R1 register returns always 0x0000 instead of 0x4000.
- CH1 = CLK using 1:1 probe
- CH2 = SDA using 1 : 10 probe!!!!
this is the first phase of the interaction:
What happens I think is :
1) sequence is started by a (correct??) start sequence
2) the controller writes 10000001 = 0x81 which is the device address 1000000 followed by a '1' indicating a READ
3) the second byte written is 00000001 which designates register 0x01 which should return a value of 0x4000
the following pictures shows what the PGA309 actually returns:
here you can clearly see that
1) the first byte seems to be 0xFF
2) answered by an ACK (0x0) by the controller
3) the second byte seems to be 0xFF
3) answered by an NACK (0x1) by the controller
4) followed by a (correct??) End or Stop
There are a couple of area's which might need further examination:
- is the start sequence correct where the SDA goes down when the CLK is already up for about 100 uS
- there is definitly some jitter (between 0.5 and 2V) on the very first '1' of the first byte (0x81) while the CLK is high (remember the 1:10 probe!)
- is the endsequence correct where the SDA goes down when the CLK is already up for about 100 uS
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