Other Parts Discussed in Thread: TPS54519
Tool/software: WEBENCH® Design Tools
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
hi,
Thank you for the answer.what is the issue with DAC .I not able to do voltage margin with this.Can u suggest me how to proceed with DAC. Please send me simulation file.
Regards
Lakshmi
Lakshmi,
I don't support any of those parts, but I had some spare time this morning and it was kind of an interesting problem.
To margin 1.8 V +/-15 % with 200.04 k as the injection resistor, the VDAC voltage needs to be 0.07659 V for +15 % and 1.150 V for -15 %. That DAC is 13.76 mV per step. So you need to control the DAC between 05h and 54h. I set your digital input for consecutive count up from 00000000 to 11111111 (8 bits)and the range from 05h to 54h. You may want to tweak this a little bit depending on your actual voltage needs. My aim was just to get you in the ballpark. I found there was some noise on the output of the DAC in certain ranges so I made a low pass RC filter prior to the connection to VSENSE. Don't ask me about it. If you have questions about the DAC make a separate post to the appropriate forum. It may be better to use a unity gain buffer, I'll leave that to you. Also you had the LSB and MSB switched between the DAC an digital source. I fixed that. It works pretty well now. You may also want to include some circuit to disconnect the DAC from the FB loop during start up to allow the TPS54519 to ramp up to 1.8 V before the margining begins. Again I will leave that up to you. Hopefully this will get you going in the right direction.