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Design ideas: Half-wave recifier + peak detector circuit 1kHz squarewave

Prodigy 50 points

Replies: 6

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Hello,

could you please suggest design ideas or even existing circuit parts to fulfill the following circuit function:

Half-wave recification and + peak detection of a DC to 1kHz squarewave signal.

The following working conditions:

INPUT SIGNAL
- input source resistance is 1kOhms
- input signal voltage ranges from -12V to +7V.
- input signal can be a dc voltage
- Input signal can be a square wave, too (neg./pos. voltage as above).
- the square wave has f=1kHz and variable duty cycles from 3% to 100% (DC)

CIRCUIT
- the circuit should not distort the input signal (-> high input resistance)
- only the positive voltage portion is needed (half-wave rectification)
- peak detection of the positive voltages is required
- The peak detection circuit has to work from DC down to 3% duty cycle signal (so the peak detector has to charge within 30us).
- A (constant) output voltage bias against the input positive voltage is acceptable

The simple circuit consisting of a diode + NPN emitter follower works well on principle, but the temperature drift is too high (Tamb=-20...+70°C).

  • I built also an OP amp based peak detector (simulation attached).

    The feedback loop is closed with R4 from output of U2 to the input of U1.
    There was overshooting at the output signal at 1kHz square wave input, which i could remove by inserting the feedback cap C3 (22p).

    While the circuit works well for square wave signals at the target frequency (1kHz), more and more overshooting occurs at lower frequencies. Extreme output overshooting occurs at a step input (for example applying a DC voltage).

    The overshooting can be seen in the simulation too, when the input signal is modified to lower frequencies or a step signal.Peak Detector_OP.TSC

    Another drawback is, that the source signal (1k resistance) is distorted when its voltage is negative (clamped by U1).

  • In reply to Oliver Filsch:

    Hi Oliver,

    Please see if the modified circuit works for your application. I am still not happy about the Q in the frequency response, but it does not oscillate any more. Let me think a better way to do this and get back to you. 

    The first and last Op Amp may not be necessary. The output buffer may not need it, if you do not load it down. 

    Peak Detector_OP E2E Original Modified 02212020.TSC

    Best,

    Raymond

  • In reply to Raymond Zhang1:

    Hi Oliver,

    Please see the attached simulation. I increased BW of the peak detector and it does not oscillate either. If you  have any comments, please let me know.

    Peak Detector_OP E2E Original Modified 02212020 New.TSC

    Best,

    Raymond

  • In reply to Raymond Zhang1:

    Dear Raymond,

    many thanks for the new circuit. The simulation results look very promising.

    Unfortunately, I missed to specify the holding time in my first post. There is the following requirement: voltage drop at peak detector output 100mV (allowed tolerance +100mV /-0mV) within 1ms. This was the reason for the 4.7nF + 10MEG in the first circuit version.

  • In reply to Oliver Filsch:

    Hi Oliver,

    Please see the attached circuit, which is very similar to the first circuit I suggested. If I understood the requirements correctly, you want to detect the peak voltage, the peak voltage drop at 100mV/-0mV for 1ms. 

    Please let me know if this is ok now. 

    Peak Detector_OP E2E Original Modified 02242020.TSC

    Best,

    Raymond

  • In reply to Raymond Zhang1:

    Dear Raymond,

    thanks again for the new version of the circuit. You have correctly understood the requirements regarding the voltage drop, now everything looks good.

    I am confident that the real circuit will behave in the same way as the simulation. Meanwhile I had to flip to another task but will be able to build the circuit within the next weeks.

    Best regards,

    Oliver

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