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LM6144: input capacitances

Part Number: LM6144
Other Parts Discussed in Thread: OPA140, LM6142

Dear forum members and support team, 

I'm using LM6144 in my design. One op amp (AOP1) is used as an inverting amplifier with RF=RI=22k.

AOP1 output is wired to an active low pass filter implemented with the three last op-amps of the LM6144 device. 

Instead of having 0V on the inverting input of AOP1 I have an oscillation as shown below.

Could this be related to input capacitance? If yes where can I find Ccm+, Ccm-, and Cdiff values?

Thanks for your help. Best regards. 

Benoît, 

  

  • Not enough info, What R values, you post this as a LM6144, but your schematic is OPA140??

    A TINA file of your actual full schematic would move this along better. 

  • Thanks for getting back to me. I don't  have TINA file.  It is a screenshot from a TI document related to op amp stability. Please don't take into account opa reference. It is the same schematic but using LM6144. R values are listed in my first post 22K each. Sorry if it was not clear.  I'm interested to know input capacitance values for LM6144. I didn't find it in the datasheet.

    Best regards

    Benoît

  • Hi Benoit, 

    Sorry to hear that you're having issues. To understand your issue better, please answer my questions below:

    1. Are you using LM6144 or OPA140 (Schematic above shows that you're using OPA140)?

    2. What are the values for V1 and V2? (In other words what's your supply)

    3. Is the inverting amplifier at stage 1 or stage 2 of your circuit ? (In other words does the input signal first go to inverting amplifier then LPF or vice-versa)

    4. Looks like the oscillation is happening at 518 kHz, what's the amplitude and frequency of the input signal?

    5. From the scope capture, what is CH2 signal?

    We've a few compensation techniques to make your circuit stable. Before we get there, let's first find the source of the oscillation. We don't have the input capacitance values right off the bat, I will ask around and try to get you an estimation. 

    Regards,

    Bala Ravi

  • Hi Benoît,

    touching the -input of OPAmp with the scope probe is no good idea because you introduce lots of capacitance (probe capacitance, stray capacitance) to this point which will erode the phase margin of OPAmp. This alone can make the LM6144 oscillate!

    I would connect a small phase lead cap in parallel to the resistor RF. This should stop the oscillation.

    But also important is what you connect to the output of OPAmp. Is there a capacitive load? If so, insert an isolation resisor of 47...100R.

    A complete schematic would be helpful.

    Kai

  • Well Benoit, 

    Not sure why you would use this old part, surely there are better newer choices, but in any case the old model file shows 2pF on each input to the negative supply, no differential C that I can see. 

  • Thanks all for your help and suggestions.

    @Michael, This is an old design and for now I need to deal with this LM6144 part. I'll take a look to a pin to pin compatible reference for test purposes. Please let me know if you have any reference in mind.

    @Kai, you are right but oscillation is also visible on the output for both probe configuration (x1 and x10).

    I'll try to clarify the situation by adding  a part of the schematic in the attached simulation file (I didn't find LM6144 but took LM6142 which shares the same datasheet).

    Best regards,

    Benoît, 

    invOp_LM6144.TSC

  • Ah yes Benoit, 

    Why oh why an added cap on the inverting node - you are adding a pole to the loop gain and should expect to be unstable, 

    Anyway, just remove that cap if you can, 

    Or add a feedback cap to shape the noise gain to around two, it is often easiest to just look at spot not for instability, Yes, you are some trouble here, 

    You could also reduce your R values and probably get into a better place, maybe 1k's. Anyway, noise gain shaping give this, stable, 

    So, not going to go further now, but probably more than you ever wanted to know is in here, 

    This 1st one sets up LG sims correctly, 

    https://www.planetanalog.com/stability-issues-for-high-speed-amplifiers-introductory-background-and-improved-analysis-insight-5/#

    This 2nd one gets into basically your issue, and a lot more, 

    https://www.planetanalog.com/stability-issues-and-resolutions-for-high-speed-voltage-feedback-op-amps-insight-6/

  • Hello Michael, 

    My mistake,  C7 is not on the design. I added C7 on the simulation file and should have been removed before being posted. 

    Thanks for the links, very informative. I 'm waiting for components I ordered two days ago to test lower R values and add a cap in // to R2.  

    Best regards, 

    Benoît 

  • Hi Benoît,

    I prefer doing a small signal transient analysis to check stability. As the following simulations show your circuit isn't stable enough:

    A phase lead capacitance of 4.3pF can improve the situation:

    A much better approach, as already mentioned by Michael, is to decrease the feedback resistances because the result is a much wider bandwidth:

    Now the situation without the 12pF stray capacitance:

    And the situation with decreased feedback resistances (notice the changed time scale):

    And how could the frequency response be improved?

    benoit_LM6144.TSC

    Kai

  • That makes sense Benoit, 

    I spun out some quick LG sims here, adding 3pF on the summing junction to account for internal model and layout is quite low, about 25deg. Keep in mind we have no idea at this point how accurate the Aol and Zol terms are in the core model, the physical device could easily have more phase shift around the loop. 

    Here is that sim file, 

    Input stage LG.TSC

    Just reducing the R's 2.2k helps a lot on LG phase margin, pops up to about 57deg, 

  • Thank you all for your help. I'll keep you informed as soon as I can test the different options. 

    Benoît,

  • Good luck :-)

    Kai

  • Hi Benoit, 

    Were you able to test the different options? If so, did you get the results that you were expecting?

    Please let us know if we can further assist you. 

    Regards,

    Bala Ravi

  • Hello Kai, Michael, 

    Sorry for my late answer. Based the components I have in stock I updated your simulation files.

    Phase margin is about 73°.

    Small signal analysis doesn't show oscillation. A spike remains visible on rising and falling edges with no impact when simulation is launched with end configuration signal (66KHz, 700mV pk-pk, 0V dc level).   

    Frequency response shows no attenuation at wanted frequency. 

    On the board this current configuration seems working well. 

    Thank you very much for all information provided on this thread. 

    Best regards, 

    Benoît, 

  • Hi Benoit,

    using Michael's simulation file, yes, the phase margin looks good:

    Keep in mind that the 1k feedback resistor is in parallel to the output load of OPAmp. Or by other words, R2 and R3 corresponds to a total output load of 667R.

    Kai

  • You are right. Thanks for mentioning this point. As soon as I have 2,2k I'll replace 1K to reduce power consumption. 

    Benoît,

  • Looks like its working Benoit, 

    That little preshoot on the edge is common with inverting stages. If you hit it with a fast enough input edge it the input feeds through the resistors directly for brief moment before the amp take the output the other direction - if you slowed your input signal down edge rate wise it would go away. And your 2nd stage filter will probably take it off anyway

  • Hi Benoit, 

    I hope your issue is resolved. I will go ahead and close this thread for now. Feel free to follow-up if you've any additional questions. 

    Regards,

    Bala Ravi