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Operational Amplifier for Fast Ethernet Signals

Other Parts Discussed in Thread: THS4631, OPA659, CDCLVD1204, CDCLVP1102

Hello,

On one of our new products we want to monitor Fast Ethernet Signals (100BASE-TX).

To add minimal signal distortion to the actual Ethernet communication that is being monitored we want to add non-inverting operational amplifiers with a Gain of 1.
The four signals (two differential pairs) shall not be modified, we just want to have a high-impedance input monitoring the Ethernet signals.

In a first try we used four THS4631, connected Vout- to Vin-, Vs+ to +5V and Vs- to -5V, both voltages generated by a DCP010505DBP.

In operation the signals at Vout- are not equal to Vin+ and are not recognized by the Ethernet PHY monitoring the communication.

Am I using a wrong operational amplifier? Do you recommend a different device for this purpose?

Thank you very much for your help!

  • Hi Peter,

    With the THS4631's CM input range and operating off of +/-5V supplies, your input range is very limited:

    As you can see, you need about 3V headroom to either rail, leaving you an input voltage range of only +/-2V!

    Could this be the reason for the Ethernet signals not replicated / buffered properly?

    Also, the device slew rate is only 550 V/us which is probably not adequate for the signals and repetition rates you are working with.

    I think OPA659 is a better choice (FET / high-impedance input, 2550 V/us slew rate, 1.5V headroom from either supply).

    How about various clock buffers available? Would that not be a better solution here?

    Regards,

    Hooman

  • Hi Hooman,

    Thank you for your advice and the recommendation to use the OPA659.

    Regarding your suggestion to use a clock buffer for my application, what device to you have in mind specifically? I have been looking for differential buffers that are designed just for the purpose of buffering Fast Ethernet Signals but could not find any. I am just looking for a device with a high-impedance input to keep the distortion of the actual communication at a minimum. And at the same time, of course, have the Fast Ethernet signals at the device's output in best condition possible.

    Thank you.

    Peter

  • For differential clock buffers suitable for 100 Mbps data rate and with high input impedance, you may consider:

    CDCLVD1204 - 1:4 LVDS

    CDCLVP1102 - 1:2 LVPECL

    We have many other differential clock buffers in our portfolio.

    Regards,

    Alan

  • The clock buffers you recommended output binary clock signals. But Fast Ethernet signals are three-level signals:

    How could these clock buffers reproduce the Ethernet signals then?

    In my design the operational amplifiers are inserted between the RJ45 jacks and the magnetics:

    What do you think about the fact that the amplifiers' outputs are connected via the magnetics? Could this be a problem?

    Thank you for your help!

  • Hello Peter,

    I can't answer the clock buffer question (tri state outputs). But I can answer that the op amp is fine with a magnetic device on the outputs. Normally we recommend matching resistors between the op amp output (near zero impedance) and the magnetic device. An unterminated transformer/balun will have different bandwidth and may not have balanced output if it is driven with a low impedance source.

    Using linear amplifiers as digital buffers is always tricky. They are designed to operate in precisely the part of the waveform that a digital circuit spends the least time. They are not designed to saturate, so the logic high and low levels need to be within the "linear" portion of the signal which leads to high power dissipation compared to a digital device.

    Regards,
    Loren