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Input leakage OPA656 when Vcm>0.75V in TINA Simulation

Harry Ramaker
Prodigy 50 points
Other Parts Discussed in Thread: OPA656

When I simulate the OPA656 in Tina or LTSpice with a voltage ramp on the input from 0 to  2V I see that the input current increases to  >45uA is that correct?

I have added the TINA schematic. Is this a flaw in the simulation model? According the datasheet it should be possible.

With kind regards,OPA656_Experiment.TSC

Harry

  • 0
    TI__Genius 12631 points
    Hello Harry,
    I tried the circuit on the bench and do not see an increase in Bias Current as suggested by the model. Also, on page 8 of the datasheet there is a curve showing Ib vs. common-mode, which doesnt indicate the same problem being seen in the TINA model. I think this is an artifact of the model and not realistic in silicon.
    -Samir