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THS4141: settling time

Part Number: THS4141
Other Parts Discussed in Thread: THS4131, THS4151

Hi all,

When my customer evaluated THS4141 with the following circuit, the 0.01% settling time becomes longer as follows.
In the data sheet of THS4141, the 0.01% settling time is 304 ns (typ), but it takes a very long time in the evaluation result.

The differential output waveform is obtained when the differential input is changed from -10 V to 0 V. The output level rises steadily to converge to 0V.

Why does the rising waveform slow like this?
Would you give me advice on how to solve it?

Each output from THS4141 is connected by two 75 Ω coaxial cables and is connected directly to an oscilloscope for observation.
The input impedance of the oscilloscope is set to 1 MΩ.

For comparison, when THS4131 is evaluated with the same circuit, converge within 0.2 mV at about 20 μs.

Regards,
Toshi

  • Hi Toshi,

    what are we seeing on the scope plots? You say that the y-scale is 100mV/Div. But the curve is orange and not yellow. The orange curve has 2mV/Div. Is this correct?

    0.01% of 10V is 1mV. So we need to look where the orange curve hits the 1mV line. This is at about 10µs for THS4141 and about 6µs for the THS4131. This makes sense, because the THS4131 is a bit faster than the THS4141 in the datasheets.

    But! You measure the settling time with a total different circuit as in the datasheet! Datasheet uses a +/-5V supply and not a +/-15V supply. It also uses a different feedback resistor, a much smaller feedback capacitance, a smaller signal and, last but not least, a total different output load, only a 800R resistance. If you connect cables to the outputs you will get totally different results of the settling time.

    Kai

  • Hi Kai-san,
    thanks for your reply.
    Yes, the orange curve has 2mV/Div. The differential output is acquired by oscilloscopes ch1 and ch2, and the difference is displayed by calculation.
    Also they observed THS4151 for comparison. The time to set the output to -1 mV was about 40 to 50 us.
    We know that the convergence time varies with parameters such as circuit constants, but we think that it is not common to change more than 10 times within the recommended operating range.
    Would you please give us your opinion on this point?

    Regards,
    Toshi
  • Hi Toshi,

    Consider the RC filter in the feedback path created by R3/R4 and C3/C4. Compared to the Rf=510 and Cf=1pf in the datasheet, the cutoff frequency is 105x slower using your values. In addition, you have added additional RC filtering at the load of 36 ohms and 120pF. In order to speed things up, minimize both feedback RC values and output RC values (ideally by impedance matching).

    Best regards,

    Sean
  • Hi Sean-san,
    Thanks for your advice.

    Based on your advice, my customer tried the following experiment. But the conclusion did not get the expected improvement.

    [Measurement result]
    · As a result of feedback capacitance reduction (51pF → 33pF), there is no change in responsiveness.
    · Feedback resistance (Rf) = Input resistance (Rg) are changed to 500 Ω, but no change in responsiveness.
    · As a result of reduced load capacity (120 pF → 50 pF), there is no change in responsiveness.
    · As a result of input voltage reduction (± 10 V → ± 5 V), 0.01% - No change in convergence time.

    So, my customer has asked whether experiment results under similar conditions or evaluation data described in the data sheet can be shared.

    Regards,
    Toshi
  • Hi Toshi,

    We do not have any experiment results other than those shared in the datasheet.

    However, you didn't reduce your component values by very much. By reducing the Cf 50p->33p and Rf 1050->500, you have only decreased the 1/(2*pi*R*C) feedback bandwidth by 3.18x, which is small compared to the 105x difference from the datasheet measurement.

    What is the reason for such a large feedback capacitance? Can you use 1pF?

    Best regards,

    Sean

  • Hi Sean-san,

    I got the answer from my customer for your question as below;

        ====Answer from my customer ====================================================
        We have to design the bandwidth under 3MHz to reduce the white noise.
        However, we can evaluate characteristics of THS4141 in 1pF of feedback capacitor.

       Can you investigate a cause of the slow response of THS4141, If we confirmed the same characteristics in 1pF.
       =============================================================================

    I would like to add additional comments.

    1. The bottleneck of the rise time due to the signal band constraint has already been resolved.

          # 1 BW = 3.0 MHz @ Rf = 1050, Cf = 51 pF ⇒ tr = 117 ns due to bandwidth constraint
          # 2 BW = 9.7 MHz @ Rf = 500, Cf = 33 pF ⇒ tr = 36 ns due to bandwidth constraints

    2. The problem is the slow settling time until reaching within 0.2mV range.


        

          

    Is this the characteristic of THS4141 and THS4151?

    I hope this will help you understand.

    Regards,
    Toshi

  • Hi Toshi,

    isn't it a bit unrealistic to expect from a chip which has an input offset voltage of up to 7mV a perfect behaviour down to 0.2mV? 0.2mV is 0.002% of a 10V step! I think these are excessive demands...

    Kai
  • Hi Kai-san,
    Thanks for your response.
    I would like to discuss the time until the output stabilizes which would be included the offset.
    THS4141 is a faster op amp than THS4131, but it has been observed that the output rises at the specified slew rate and its rise will be very slow as it approaches the expected predetermined voltage.
    I would like to clarify whether this is the characteristic or the setting of a constant.

    Regards,
    Toshi
  • Hi Toshi,

    You are using a 1Mohm termination scope. If you want to avoid capacitance introduced by the coaxial cable, you need to impedance match. I think that this settling time may equal the RC time constant of 72Ohms * (240pF + output capacitance)?

    Best regards,

    Sean
  • Sean-san,
    Thanks for your reply.
    I got the answer from my customer as below;

    Can I ask anyone to verify the characteristic of settling time?

    ------------------------------------------------------------------------------------
    It's wrong that the settling time is restricted by output impedance.
    Output RC low-pass filter makes that its bandwidth is 5MHz at least. (R=100ohm, C=300pF, including parasitic value) So that, the settling time should be <200ns at 0.01%.

    I know distributed constant circuit theory.
    Your comment about impedance matching is correct, but it is range of lumped constant circuit in this case.
    Because the coaxial cables I used are only 2m (< 1/30 wave length, including shorting effect).
    So it's not necessary of care of impedance matching.

    Can you show me measured settling response of THS4141?
    ------------------------------------------------------------------------------------

    Best regards,
    Toshi
  • Hi Toshi,

    it's not unusual that an extreme fast amplifier shows an unexpected long 0.01% settling time. This can have several causes. One reason is the existence of a capacitive load, either at the output or in the feedback loop. This is trivial and need not to be discussed furtherly.

    Another cause is dieletric absorption within the chip, external circuit capacitances and the cabling. I hope you are only using NP0 caps and high quality cables?

    By the way, how do you measure the output signal? Do connect a scope probe directly to the output? If so, Is it a 1:1 or 10:1 scope probe? Keep in mind, that scope probes can also have settling time issues!

    Kai

  • We are considering adopting THS4131 from the evaluation result that the convergence time of THS4131 is shorter than THS4141.
    However, if it is not possible to clarify the difference between the convergence time of THS4141 and THS4131, it is possible that such a result happened by chance.
    In addition, it is necessary to consider variations due to lot, so if we can share the same results on both sides, I think that it will be a safe material, so would you please cooperate with this matter?

    Best regards,
    Toshi
  • Hi Toshi,

    We can only guarantee the settling time in the datasheet under the specified test conditions. If you reproduce the datasheet test conditions and still find a delayed settling time, then it can be determined if this part varies from other lots.
    In your custom test condition, the differential step of 10V will cause the input transistor pair will slew, meaning one input transistor will conduct full current while the other conducts none. This leads to a thermal imbalance with a time constant of about 20us. If this "thermal tail" is what is causing the issue, a possible solution is to reduce the edge rate or decrease the step size to 2Vpp.

    Best regards,

    Sean
  • We have discussed the impact of the self-heating effect on the settling time also here:

    e2e.ti.com/.../2650936

    Kai
  • Hi Sean-san,
    thank you for your answer.
    I understood your explanation and will try to discuss this matter with my customer.

    I will inform you if my customer has further questions.

    Thanks and regards,
    Toshi
  • Hi, Kai-san,
    thanks for the information of the impact of the self-heating effect on the settling time .

    Best regards,
    Toshi