Part Number: TLV2401
Excuse me. I measured the input offset voltage of TLV2401 on TI EVM board by the topology below. (VCC=5V)
The measured offset voltage of one sample is about 400uV, but the other one is about 1200uV.
I know the input offset voltage spec. in the datasheet is 390uV(TYP) and 1200uV(MAX).
But in the datasheet page8, figure2, the input offset voltage is almost zero when common-mode input voltage=0V.
Why??? Would you please explain the difference?
Thank you very very much.
In reply to Jaskaran Atwal:
In reply to Chuck Sins:
I used the below topology on TI EVM board to measure the offset.
Is it OK?? Thank you very much for your response.
In reply to CK Ho:
That is not exactly how we do it. We use what is called a two-amp loop which provides control of both the output and the input. The circuit looks like this.
Theoretically, what you are doing is fine. I am struggling to explain why your readings are so high. I presume your resistors are measured, known values, and that you are using a precision voltmeter. Depending on how much noise you are picking up, you may need to average. I wonder if you are causing the output to oscillate when you connect your meter due to the added capacitive load. You may want to add 10k in series between the output and the meter and see if that alters your measurement. this is another reason why we use the two-amp loop. Our test hardware has many resources connected to the output for various tests and using the 2nd amp allows us to isolate the DUT from these loads.
Sorry CK, my image didn't load. Now with the circuit.
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