My application is a low noise charge amp. Thus, knowing the CM and DM input capacitances is important for predicting the white input referred voltage noise density. Unfortunately, the datasheet for this device does not list values for these parameters. So, to see if the model included them, I ran simulations of the input capacitance measurement circuits shown in Figure 8.8 on page 97 of Bob Pease's book Troubleshooting Analog Circuits. The values I obtained were so improbably small that I concluded that they weren't part of the model either. Has anyone characterized them?
The LMP7721 is based on the LMP7711 core. The LMP7711 datasheet has a Cin graph in the apps section of the datasheet.
Because the 7721 has the bootstrapped ESD diodes (the reason for the low input bias), the input capacitance will be about 2-3pF less than the LMP7711.
The 7721's common mode input capacitance is about 11pF at mid VCM under feedback (minimal Cdm contribution). It is high because the input stage is low noise input stage, which requires greater gate area. I don't recall the Cdm numbers...but I would guess around 2-3pF (again, because of the large input area).
A quick way to measure the total input capacitance is to set the LMP7721 up as a follower (output to inverting input) and use a large input resistor (100K to 1Meg) in series with the non-inverting input. This large resistor will form a RC pole with the input capacitance.
A signal of 1KHz to 100KHz is then sourced through the series resistor to find the RC pole, which can then be used to calculate Cin against the known series resistor.
The trick is to use a large resistor, 100K to 1Megohm, with a very low parallel capacitance. A typical 1/4 watt resistor has 0.3pF across it - which can interfere with this measurement. The solution is to place several resistors in series to add up to the desired resistance. Five resistors in series, floating in the air, will have around 0.06pF of parallel capacitance.
Here is how you do it:
I start with a resistor value of about 1Mohm (five 200K's in series) from the generator output directly to the positive input.
Set the generator to 1KHz, 100mVpp sine wave. Apply the generator directly to the non-inverting input (easily done by temporarily shorting out the resistor). Monitor the DUT output with a scope or AC DMM. The DUT output should be 100mVpp. This is the "reference" reading.
Remove the short from the resistor and slowly sweep the generators frequency up until the DUT output level drops to 70.7mVpp (0.707 * reference level) and note the generator frequency. For the 7721, using a 1MEG resistor, this should be around 15KHz.
With the known frequency and resistor values, you can calculate C from the standard RC formula. Note that this C value includes Ccm, Cdm, trace and fixture capacitance (the total capacitance at the non-inverting input). Solder the resistor directly to the input lead, lifted into the air, for most accurate results.
Hope this helps...
Integrated Signal Chain Applications, SVA
Thank you. Just for clarity's sake, and given that my Vs = +/- 2.5V, you would estimate the 7721's common mode input capacitance to be "about 11pF at mid VCM under feedback (minimal Cdm contribution)." I take it that this value is from either input to ground. Am I correct?
Yes. From either input to ground. Each input will be ~11pF to ground. Where (AC) "Ground" is considered the mid-point of the supplies.
Thanks for your clarification. On last question, do you have Ccm and Cdm values for the LM6211?
There is a input capacitance vs common mode voltage plot on page 11 of the datasheet, and it is mentioned as 5.5pF in the front page text.
Ccm looks to be about 5.5 to 6pF. I did not see any data for Cdm.
This device was designed for PLL filters - so the 1/f noise is fairly low for a fast CMOS device. This also means larger gate area, too. But not by much.
Also see the LMH6601 or OPA355 CMOS if you need speed (250MHz) and low input capacitance (<2pF). Though because it is not optimized for noise and it is a high-speed device, the 1/f and noise is fairly high.
I just found the common mode capacitance vs. common mode voltage graph for the 6211. For my application, it looks like it'll be about 7pf. Is the front-end's topology similar to that of the LMP7711 so that I can I safely use 2-3pf for the differential mode capacitance?
No, the 7211 and 6211 are completely different animals. To get the 24V supply, the 6211 is built on a different process and also has a bootstrapped CMOS front end, so they are not exactly the same. But they may be similar as far as strays - so 2-3pF would probably be in the ball park.
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