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INA826 input current during an overvoltage

Dimitrios Papadopoulos
Intellectual 640 points
Other Parts Discussed in Thread: INA826, INA826EVM, TINA-TI

Hello,

I plan to use an INA826 at unity gain, with small (<20 Ohm) series resistors on its inputs (this resistor value cannot be increased for a number of reasons). It is critical to know at least one of the following overload parameters:

1. The maximum input current (at inverting or non-inverting input) of the INA826 at 25oC, when a +/-15V input overvoltage occurs and the device is powered off. That is, when both supply pins are at 0V.

2. The same parameter at +85oC.

The problem with the datasheet (figure 17) page is that it provides only typical values at non-zero supply voltage and room temperature. I could extrapolate the temperature coefficient of the threshold voltage of the internal FET limiter. I could also made some assumptions for the power-off condition. But the spread of the threshold voltage (from part to part) is still unknown and quite unpredictable. At least I could make some fair assumptions if I knew that spread (say, within 98% confidence value).

Thank you in advance

  • 0
    TI__Prodigy 140 points

    Hi Dimitrios,

    Here is Monte Carlo simulation result I got for you with supply @ 0V.

    Ip15 is the input current with positive 15V applied.

    In15 is the input current with negative 15V applied.

    25C        StdDev     average   Mu+/-3sigma
    Ip15        0.504mA     -5.48mA   -6.99mA to -3.97mA
    In15        0.504mA     5.49mA    3.97mA to 7mA

    85C        StdDev     average   Mu+/-3sigma
    Ip15        0.407mA    -4.78mA   -6mA to -3.55mA
    In15        0.407mA    4.78mA    3.56mA to 6mA

    This simulation is based on the assumption our JFET Monte Carlo model is correct.

    However, when I look at the datasheet. the Fig 17 is based on measurement of few devices from a single lot. the corresponding input current @ 15V over-voltage is about 6.5mA. So our JFET monte carlo model could be OFF. Assume the lot we measured Fig17 is a nominal lot. Then we can scale up the simulation data by 6.5/5.48 times, which would results:


    25C        StdDev     average   Mu+/-3sigma
    Ip15        0.605mA     6.58mA   -8.4mA to -4.8mA
    In15        0.605mA     6.58mA    4.8mA to 8.4mA

    85C        StdDev     average   Mu+/-3sigma
    Ip15        0.49mA    -5.74mA   -7.2mA to -4.26mA
    In15        0.49mA    5.74mA    4.26mA to 7.2mA

    FYI: We will have new revision of the INA826 come out which fix the phase reversal problem although the input current vs input overvoltage characteristic will be the same.

    regards,

    Wei

     

  • 0 in reply to Wei Xu41022
    Intellectual 640 points

    Dear Wei,

    Thank you very much for the quick and thorough response. Fyi, the input current on my INA826EVM (ordered 1 month ago) is only 1 to 1.2mA @ +/-15V, 25 deg C, at power-off. So it is way off the typical 6.5mA value. Maybe a recent change to the JFET geometry?

    In any case, since TI is probably revising the datasheet, it would be nice to add a maximum value there, extracted e.g. from the analysis you posted above.

    Best regards

    Dimitrios

  • 0 in reply to Dimitrios Papadopoulos
    Intellectual 640 points

    Oops, I forgot to mention that it was a surprise to see a negative current coefficient. This is because I was initially assuming that INA826 uses mos depletion fets and a resistor across their gate-source (in that type of limiter, current seems to increase with temp.) Therefore I have to know the lowest temp value (-40oC). Sorry for missing that.

    I had already tried to simulate INA826 in TINA , but the results were radically different than yours (1.4mA, no temperature dependence). This happens, I think, because INA826 model uses the generic SPICE n-jfet model PJF with parameters Beta=315.0u Lambda=10m Vto=-2.0.

    So I wonder whether you simulated the INA826 model supplied by TINA-TI or a special jfet. Is it possible to post here the lowest temp (-40oC) Monte-Carlo results or help me in setting up the same simulation environment as yours?

    Best regards

    Dimitrios

  • 0 in reply to Dimitrios Papadopoulos
    TI__Prodigy 140 points

    Dear Dimitrios,

    We used two PJFETs for the input current limit. PJFET is a "by-product" from our high performance BJT process. The main purpose is to limit the current to protect the input devices and allow input go +/-40V beyond the supply rails  and not generate much noise during normal operation. The 1.2mA you measured is much lower than the weak corner model I simulated. So the process variation must be much larger than the model.

    So the simulation model accuracy and max current limit may not be guaranteed. I can request to get better model from the modeling. It takes time.

    I'v simulated -40C

    -40C        StdDev     average   Mu+/-3sigma
    Ip15        0.59mA     -6.64mA   -8.42mA to -4.86mA
    In15        0.594mA     6.64mA    4.86mA to 8.42mA

    You can multiply this number by 6.5/5.48 also. It may not be meaningful anymore, according to your measurement.

    Best regards,

    Wei

  • 0 in reply to Wei Xu41022
    Intellectual 640 points

    Dear Wei,

    I would really like to see here the results from an updated JFET model that fits better to the real measurements.

    Best regards,

    Dimitrios

  • 0 in reply to Dimitrios Papadopoulos
    TI__Prodigy 140 points

    Dimitrios,

    I have reported this issue. However, it could be a very long process. Please be patient with us.

    Best regards,

    Wei

  • 0 in reply to Wei Xu41022
    Intellectual 640 points

    Wei, thank you very much for your involvement and the speedy responses. Looking forward for the next update.

    Dimitrios